A Sub-1-μs Ultrafast-Response Buck Converter With Improved Analog-Voltage-Dynamic-Estimation Techniques

Chen, Jiann‐Jong; Hwang, Yuh‐Shyan; Chai, Hao-Hung; Ku, Young; Yu, Cheng‐Chieh

doi:10.1109/tie.2017.2733444

Cited by 8 publications

(2 citation statements)

References 6 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…By comparing the transient response time and output-voltage ripple between a conventional buck-boost converter and the proposed converter in Figure 3 and Figure 4 it is clear that the transient response time of the proposed converter is shorter than that of a conventional one. Moreover, to further enhance the transient response and efficiency, several methods have been introduced to further develop the proposed converter [19]- [22]. The proposed converter may provide a better output-voltage ripple when drawn by a large output current and the buck stage works in CCM.…”

Section: Resultsmentioning

confidence: 99%

A Novel Boost-Buck Converter Architecture for Improving Transient Response and Output-Voltage Ripple

Kurniawan¹,

Lasmadi²,

Dinaryanto³

et al. 2020

J. ICT Res. Appl.

View full text Add to dashboard Cite

Buck-boost converters are widely used in the development of DC-DC converters. Several techniques and algorithms have been introduced to improve the transient response of buck-boost converters. However, due to the opposite trends of the output current change and the output voltage change, undershoot or overshoot in the output voltage still seems to be inevitable. In order to overcome this problem, a novel boost-buck converter architecture is proposed to build a fast transient response DC-DC converter. The converter consists of a cascaded configuration of the boost and buck stages. The boost stage converts the input voltage to the shared capacitor voltage and the buck stage supplies energy to the load by converting the shared capacitor voltage to the output voltage. By harnessing the energy stored in the shared capacitor, the transient response of the boost buck converter can be improved to 2 µs in a step-up load current change of 1 A with an output-voltage ripple of 15 mV.

show abstract

Section: Resultsmentioning

confidence: 99%

A Novel Boost-Buck Converter Architecture for Improving Transient Response and Output-Voltage Ripple

Kurniawan¹,

Lasmadi²,

Dinaryanto³

et al. 2020

J. ICT Res. Appl.

View full text Add to dashboard Cite

show abstract

“…[7], V 2 control is employed in Refs. [8][9][10][11], V 1 concept is introduced in Ref. [12] and a capacitor-current-sensor (CCS) calibration technique with transient optimization is proposed in Ref.…”

Section: Introductionmentioning

confidence: 99%

Fast-transient techniques for high-frequency DC–DC converters

Cheng

Tang

et al. 2020

J. Semicond.

View full text Add to dashboard Cite

A 30 MHz voltage-mode controlled buck converter with fast transient responses is presented. An improved differential difference amplifier (DDA)-based Type-III compensator is proposed to reduce the settling times of the converter during load transients, and to achieve near-optimal transient responses with simple PWM control only. Moreover, a hybrid scheme using a digital linear regulator with automatic transient detection and seamless loop transition is proposed to further improve the transient responses. By monitoring the output voltage of the compensator instead of the output voltage of the converter, the proposed hybrid scheme can reduce undershoot and overshoot effectively with good noise immunity and without interrupting the PWM loop. The converter was fabricated in a 0.13 μm standard CMOS process using 3.3 V devices. With an input voltage of 3.3 V, the measured peak efficiencies at the output voltages of 2.4, 1.8, and 1.2 V are 90.7%, 88%, and 83.6%, respectively. With a load step of 1.25 A and rise and fall times of 2 ns, the measured 1% settling times were 220 and 230 ns, with undershoot and overshoot with PWM control of 72 and 76 mV, respectively. They were further reduced to 36 and 38 mV by using the proposed hybrid scheme, and 1% settling times were also reduced to 125 ns.

show abstract

High-power buck chip design for vehicle far/near headlights

Hsia

Sung-Keng

2022

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

A Sub-1-μs Ultrafast-Response Buck Converter With Improved Analog-Voltage-Dynamic-Estimation Techniques

Cited by 8 publications

References 6 publications

A Novel Boost-Buck Converter Architecture for Improving Transient Response and Output-Voltage Ripple

A Novel Boost-Buck Converter Architecture for Improving Transient Response and Output-Voltage Ripple

Fast-transient techniques for high-frequency DC–DC converters

High-power buck chip design for vehicle far/near headlights

Contact Info

Product

Resources

About