2005
DOI: 10.1109/ted.2005.846335
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A Surface-Potential-Based High-Voltage Compact LDMOS Transistor Model

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Cited by 55 publications
(18 citation statements)
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“…The temperature rise due to self-heating is taken into account via a thermal network (not shown here) [7]. Low-voltage LDMOS devices lack a thick-field-oxide drift region, and thus have a relatively short drift region; see [1]. In these devices the conductivity of the drift region is always larger than that of the channel region, so that saturation of the current is controlled by the channel region [8].…”
Section: High-voltage Ldmos Devicesmentioning
confidence: 99%
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“…The temperature rise due to self-heating is taken into account via a thermal network (not shown here) [7]. Low-voltage LDMOS devices lack a thick-field-oxide drift region, and thus have a relatively short drift region; see [1]. In these devices the conductivity of the drift region is always larger than that of the channel region, so that saturation of the current is controlled by the channel region [8].…”
Section: High-voltage Ldmos Devicesmentioning
confidence: 99%
“…For the calculation of the internal drain quasi-Fermi potential V Di , the channel current I ch is expressed as (see [1] with the surface-potential drop Δψ s replaced by V DiS )…”
Section: A Channel Currentmentioning
confidence: 99%
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“…Surface potential based LDMOS models have been reported for DC operation only [24], and for the DC and AC domains [25]. The latter combines the low-voltage MOS region with the high-voltage drift region but does not demonstrate scalability.…”
mentioning
confidence: 99%