2016
DOI: 10.1145/2755563
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A Survey on Chip to System Reverse Engineering

Abstract: The reverse engineering (RE) of electronic chips and systems can be used with honest and dishonest intentions. To inhibit RE for those with dishonest intentions (e.g., piracy and counterfeiting), it is important that the community is aware of the state-of-the-art capabilities available to attackers today. In this article, we will be presenting a survey of RE and anti-RE techniques on the chip, board, and system levels. We also highlight the current challenges and limitations of anti-RE and the research needed … Show more

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Cited by 201 publications
(92 citation statements)
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“…For a reverse engineer attacker, it is very difficult to figure out the functionalities of these logic units while a popular approach is to perform attempts for many times. However, these configured true or dummy contacts still could be detected by de-layering and cross-section imaging using SEM or TEM techniques [14] so that it still has some potential security risks. Another kind of approach is structural obfuscation which is performed by structural transformation on sequential circuits [9][15], and could even reduce the circuit area or delay compared with the un-obfuscated design occasionally.…”
Section: Arxiv:180202789v1 [Cset] 8 Feb 2018mentioning
confidence: 99%
See 1 more Smart Citation
“…For a reverse engineer attacker, it is very difficult to figure out the functionalities of these logic units while a popular approach is to perform attempts for many times. However, these configured true or dummy contacts still could be detected by de-layering and cross-section imaging using SEM or TEM techniques [14] so that it still has some potential security risks. Another kind of approach is structural obfuscation which is performed by structural transformation on sequential circuits [9][15], and could even reduce the circuit area or delay compared with the un-obfuscated design occasionally.…”
Section: Arxiv:180202789v1 [Cset] 8 Feb 2018mentioning
confidence: 99%
“…The objective of chip reverse engineering is to extract the large scale layout as gate-level netlist automatically by depackaging, de-layering, imaging and annotation [14]. Furthermore, the gate-level netlist could be even converted to a higherlevel abstraction which is very useful for the attackers to understand the system functionalities.…”
Section: A Basics Of Circuit Obfuscationmentioning
confidence: 99%
“…Here, the goal is to deprocess the IC which is embedded in the protective package. To this end, various steps are involved: (1) depackaging and mechanical preprocessing, (2) delayering and imaging, and (3) software post-processing [5].…”
Section: B Chip-level Reverse Engineeringmentioning
confidence: 99%
“…Despite intensive research on hardware reverse engineering [5], [9] and companies that perform on-demand reverse engineering [10], [11], reverse engineering is still an opaque and poorly understood process. The question is not whether analysts are able to reverse engineer a given design, since with sufficient resources reverse engineering will always succeed.…”
Section: Introductionmentioning
confidence: 99%
“…• Reverse engineering: Reverse engineering requires a series of images be captured and stitched together [13]. Generally, AMS ICs are fabricated with older technology nodes, have a low count of transistors, and have lower circuit density, thereby making the imaging process much simpler.…”
Section: Digital Ic Vs Ams Icmentioning
confidence: 99%