A Survey on Low-Power GNSS

Abstract

With the miniaturization of electronics, Global Navigation Satellite Systems (GNSS) receivers are getting more and more embedded into devices with harsh energy constraints. This process has led to new signal processing challenges due to the limited processing power on battery-operated devices and to challenging wireless environments, such as deep urban canyons, tunnels and bridges, forest canopies, increased jamming and spoofing. The latter is typically tackled via new GNSS constellations and modernization of the GNSS signals. However, the increase in signal complexity leads to higher computation requirements to recover the signals; thus, the trade-off between precision and energy should be evaluated for each application. This paper dives into low-power GNSS, focusing on the energy consumption of satellite-based positioning receivers used in battery-operated consumer devices and Internet of Things (IoT) sensors. We briefly overview the GNSS basics and the differences between legacy and modernized signals. Factors dominating the energy consumption of GNSS receivers are then reviewed, with special attention given to the complexity of the processing algorithms. Onboard and offloaded (Cloud/Edge) processing strategies are explored and compared. Finally, we highlight the current challenges of today's research in low-power GNSS.

Hard SyDR: A Benchmarking Environment for Global Navigation Satellite System Algorithms

“…The acquisition is often highlighted as the most computationally complex part [ 1 ] as it might involve a significant number of arithmetic operations for performing convolutions. While the use of the FFT in modern receivers dramatically reduces this complexity, from (Serial Search) to (Parallel Code Phase Search (PCPS)) [ 1 ], the acquisition stage still requires more operations than the tracking stage. Moreover, using the FFT in hardware has proven challenging, as discovered in our experiments reviewed in Section 5 .…”

“…The actual complexities of the DSP operations of a GNSS receiver are highly dependent on the scenario assumptions (e.g., algorithms used, environment, Assisted-GNSS, user dynamics, etc.) [ 1 ].…”

“…Yet, the important conclusion is that while acquisition might be more power-hungry than tracking, minor optimizations in the tracking stage could ultimately lead to considerably larger energy savings. Thus, while research over the last years has focused on reducing acquisition complexity [ 1 ], greater energy savings could be achieved with improvements in the correlator complexity.…”

“…Nowadays, many kinds of electronics use satellite positioning systems or GNSSs for positioning and timing purposes [ 1 ]. Off-the-shelf GNSS receiver chips are available in a great variety for integration in embedded devices and for different applications, e.g., high-precision, autonomous driving, low-power, etc.…”

A flexible system-on-chip FPGA architecture for prototyping experimental GNSS receivers

“…The FPGA incorporates hardware accelerators for the algorithms with the highest computational cost: the acquisition and tracking multicorrelators [101]. The most computationally expensive algorithms are the signal processing stages that process the digitized signals at the sampling rate.…”