Abstract:This paper presents a switched-current (SI) third-order sigma-delta modulator (SDM) which consists of a current-mode sample-and-hold (S/H) and a feedback topology to reduce the input impedance at input terminal, and a common-mode feed-forward (CMFF) circuit to improve the common-mode offset at output terminal. Besides, a SI feedback memory cell (FMC) with low clock feedthrough (CFT) error is presented with a coupled differential replica (CDR) topology. The proposed third-order SDM is designed and implemented w… Show more
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