A switched-LNA in 0.18 μm CMOS for Bluetooth applications

Krug, F.; Russer, P.; Beffa, Federico; Bächtold, W.; Lott, U.

doi:10.1109/smic.2003.1196674

Cited by 7 publications

(5 citation statements)

References 9 publications

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“…Comparing to the normal gain-switched technique in Ref. [2], this work can reach lower harmonic distortion and larger dynamic range.…”

Section: Introductionmentioning

confidence: 88%

“…Due to the extreme variations in the receiving field amplitude [2] , Bluetooth receiver must exhibit a high dynamic range, in the specification V1.2, the minimum requirement is -70dBm to -20dBm, normally we need to improve it from -85dBm to -10dBm to leave more margin and fwfill different applications. One of the strict applications in this paper should meet the requirement of the long distance connection, because in this case of an LNA with high sensitivity is required to detect the signal.…”

Section: Design Specificationmentioning

confidence: 99%

“…The common source transistor M1 is a wide transistor to get high transconductance, the cascade transistor M3 is normally a similar or a little smaller transistor as M1, which is used to reduce the interaction of the tuned output with the tuned input and also to reduce the effect of M1's C gd [5] . The total node capacitance at the drain of M3 resonates with the inductance L d both to increase the gain at the center frequency and simultaneously to provide an additional level of highly desirable band-pass filtering [2] . The input impedance can be written as…”

Section: Lna Corementioning

confidence: 99%

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A 0.18μm CMOS gain-switched LNA and mixer with large dynamic range

Yang

Xue

2008

J. Electron.(China)

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A 2.4GHz 0.18μm CMOS gain-switched single-end Low Noise Amplifier (LNA) and a passive mixer with no external balun for near-zero-IF (Intermediate Frequency)/RF (Radio Frequency) applications are described. The LNA, fabricated in the 0.18μm 1P6M CMOS technology, adopts a gain-switched technique to increase the linearity and enlarge the dynamic range. The mixer is an IQ-based passive topology. Measurements of the CMOS chip are performed on the FR-4 PCB and the input is matched to 50 .Ω Combining LNA and mixer, the front-end measured performances in high gain state are: -15dB of S11, 18.5dB of voltage gain, 4.6dB of noise figure, -15dBm of IIP3, -85dBm to -10dBm dynamic range. The full circuit drains 6mA from a 1.8V supply.

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“…Comparing to the normal gain-switched technique in Ref. [2], this work can reach lower harmonic distortion and larger dynamic range.…”

Section: Introductionmentioning

confidence: 88%

Section: Design Specificationmentioning

confidence: 99%

Section: Lna Corementioning

confidence: 99%

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A 0.18μm CMOS gain-switched LNA and mixer with large dynamic range

Yang

Xue

2008

J. Electron.(China)

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“…Due to the dependence of (17) and (18) on L s , it is reasonable to expect that the L s derivation of (10) or (15) may overestimate L s when the LNA is loaded. Ignoring C gd , in the unilateral amplifier in Fig.…”

Section: Simple Mosfet and A Loadmentioning

confidence: 99%

Two-port noise figure optimization of source-degenerated cascode CMOS LNAs

Belostotski

Haslett

2008

Analog Integr Circ Sig Process

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This paper presents a noise figure optimization technique for source-degenerated cascode CMOS LNAs with lossy gate inductors. The optimization technique, based on two-port theory, takes into account second order parasitic components. The effect of inductive source degeneration on LNA noise parameters is discussed. Measured noise figures agree well with the simulations confirming the accuracy of the noise model and allowing us to investigate the contributions of various components to the overall noise figure. A 0.18-lm CMOS LNA with an integrated inductor (Q = 7.5) achieves a noise figure of 1.16 dB and a return loss of 20 dB at 1.4 GHz, drawing 39 mA from a 1.8-V voltage supply, having gain (S 21 ) of 14.5 dB, input P1dB of -17.5 dBm, and input IP3 of -13 dBm. LNAs with external inductors having quality factor of Q = 170 and Q = 40 achieve noise figures of 0.65 dB and 0.68 dB and a return loss of 20 dB at 1.4 GHz, drawing 37 mA from a 1.8-V voltage supply, having gain (S 21 ) of 17 dB, input P1dB of -22 dBm, and input IP3 of -14 dBm. The large power consumption of the presented designs was intentionally selected in order to reduce the noise figure, an acceptable trade-off for LNA's targeted for radio telescope applications, and to assess the impact of the large currents flowing through interconnect metals on the noise figure

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“…This leads to an easy input matching especially if broadband performance is required. Some state of the art LNA achievements are summarized in Table I, [12], [13], [14], [15]. Because of the higher supply voltage needed for a cascode design, CS and CG architectures are preferred if power requirements dominate.…”

Section: A Low Noise Amplifiers (Lnas)mentioning

confidence: 99%

Design of RF-CMOS integrated circuits for wireless communications

Boeck¹

2008

2008 National Radio Science Conference

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A switched-LNA in 0.18 μm CMOS for Bluetooth applications

Cited by 7 publications

References 9 publications

A 0.18μm CMOS gain-switched LNA and mixer with large dynamic range

A 0.18μm CMOS gain-switched LNA and mixer with large dynamic range

Two-port noise figure optimization of source-degenerated cascode CMOS LNAs

Design of RF-CMOS integrated circuits for wireless communications

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