A Symbol-Rate Timing Synchronization Method for Low Power Wireless OFDM Systems

Abstract

Abstract-This work addresses power reduction and performance improvement for wireless orthogonal frequency-division multiplexing (OFDM) systems using a dynamic sample-timing controller (DSTC) and phase-tunable clock generator (PTCG). The receiver, applying the proposed DSTC algorithm, searches for the optimal sampling phase at the symbol rate, instead of the Nyquist rate (or higher), to reduce the extra power consumed in high-rate operations. The proposed PTCG circuits provide the desired clock phase for optimum sampling to improve system performance. Both the DSTC and the PTCG are evaluated in a multibandt OFDM (MB-OFDM) ultra-wide-band system. Simulation results indicate that the overall system performance is improved by 1.7-dB signal-to-noise ratio at a packet error rate of 8% and the total baseband power is reduced by 40%.Index Terms-Dynamic sample-timing controller (DSTC), orthogonal frequency-division multiplexing (OFDM), phase-tunable clock generator (PTCG), synchronization, ultra-wide-band.

Research on timing synchronization algorithm for OFDM systems in Rician channel

“…With the further studies and development of technology, OFDM technology has gradually matured, which possesses the strong antiinterference ability, high spectral efficiency, and easy signal modulation and demodulation. On the contrary, there are also some limits in OFDM system [1]- [6]. The performance of the OFDM system receiver depends on the effect of signal synchronization.…”