A T-shaped gate tunneling field effect transistor with negative capacitance, super-steep subthreshold swing

Abstract

With the development of semiconductor technology, the size of traditional metal oxide semiconductor field effect transistor devices continues to decrease, but it cannot meet the requirements of high performance and low power consumption. Low power tunneling field effect transistor (TFET) has gradually become the focus of researchers. This paper proposes a novel T-shaped gate TFET based on the silicon with the negative capacitance (NC-TGTFET). On the basis of TGTFET, ferroelectric material (HZO) is used as gate dielectric. The simulation results show that, compared with the traditional TGTFET, the opening order and sensitivity of the two tunneling junctions are different. The influences of thickness and the doping concentration of pocket and ferroelectric material properties on the characteristics of NC-TGTFET is also discussed by Sentaurus simulation tool. Furthermore, the negative capacitance of ferroelectric material makes NC-TGTFET have a very steep subthreshold swing (18.32 mV/dec) at the range of drain current from 1×10 −15 to 1×10 −7 A μm −1 . And the on-state current (V g = 0.5 V, V d = 0.5 V) is 1.52×10 −6 A μm −1 .

Gate‐all‐around nanowire vertical tunneling FETs by ferroelectric internal voltage amplification

“…deposition and etching). This dictates that the fabrication of proposed structure is comparatively feasible than the recent demonstrations of ferroelectric or NC-VTFETs [38,39].…”

Gradient voltage amplification effect in FDSOI NCFET with thickness-variable ferroelectric layer

“…The 2D thin film channel is also considered because it's excellent ability in achieving steep SS and large I ON /I OFF ratio [9][10][11]. The special structure such as T-shaped gate NCFET [12], highly-doped double-pocket double gate NCFET [13,14] have been proposed and shown great ability in achieving steep SS [15] introduces a box ferro FDSOI which attaches ferroelectric layer to buried oxide to mitigate the negative differential resistance (NDR) effect. The first principle explanation of the NDR effect is presented, and the element which can influence the characteristic of NCFETs is also investigated in this reference.…”

A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P+-Pocket and InAlAs-Block

“…However, the on-state current (I on ) of TFETs is too low for reasonable performance, which makes most research focus on overcoming this drawback. Therefore, TFETs with new structures or operation mechanisms have appeared in large numbers, such as two-dimensional material TFETs [4][5][6], negative capacitance TFETs [7][8][9], heterojunction TFETs [10][11][12], nanowire TFETs [13][14][15], line tunneling (L-tunneling) TFETs [16][17][18][19][20][21][22][23][24][25][26][27][28][29], etc. Comprehensive analysis shows that expanding the tunneling area based on the L-tunneling mechanism is a very effective approach to improving I on .…”

“…The electron-hole bilayer TFET (EHBTFET) [19][20][21][22][23][24][25][26][27][28][29] is a new type of L-tunneling TFET that was first proposed by Lattanzio [19] and has been developed in recent years because of its novel tunneling mechanism. Different from the L-tunneling TFETs with the L/U/T-type gate structure [16][17][18] that create the L-tunneling by overlapping the gate and heavily doped source region, EHBTFETs can generate the L-tunneling perpendicular to the channel in the electron-hole bilayer formed by the gate engineering or bias-induced method. So far, research has mainly focused on the transverse EHBTFETs, from which it has been found that the vertical L-tunneling not only boosts I on but also leads to high off-state current (I off ).…”