Physics aims at the future linear colliders impose such stringent requirements on detector systems that exceed those met by any previous technology. Amongst other novel technologies, SPADs (Single Photon Avalanche Diodes) detectors are being developed to track high energy particles at ILC (International Linear Collider) and CLIC (Compact LInear Collider). These sensors offer outstanding qualities, such as an extraordinary high sensitivity, ultra-fast response time and virtually infinite gain, in addition to compatibility with standard CMOS technologies. As a result, SPAD detectors enable the direct conversion of a single particle event onto a CMOS digital signal in the sub-nanosecond time scale, which leads to the possibility of single BX (bunch crossing) resolution at some particle colliders. However, SPAD detectors suffer from two main problems, namely the noise pulses generated by the sensor and the low fill-factor. The noise pulses worsen the detector occupancy, while the low fill-factor reduces the detection efficiency. This work presents the development of an SPAD pixel detector in standard CMOS technologies as a proof of concept of such devices aimed at the vertex and tracker regions of the future linear colliders. To comply with the specifications imposed by ILC and CLIC, solutions to minimize the intrinsic noise pulses and increase the fill-factor are provided.