A test set embedding approach based on twisted-ring counter with few seeds

Memory less Rotation Based BIST with Low Area Overhead

“…Here we tries to identify a set of internal nets from the CUT to provide the required logic values to the CSR, we develop an efficient method to generate effective test patterns (seeds) based on the current circuit responses. Experimental results show that our method can achieve complete stuck-at fault coverage using fewer test cycles than those in [2] and [5]. Comparison with the other techniques shows that we can use lower area overhead and comparable test time to reach complete fault coverage.…”

“…However it should be noted that in our method full rotation is not always required for each pattern. Due to this novel feature, fewer test cycles are required than previous works [2][3][4][5]. The required initial patterns for the CSR can be generated by resetting the CUT.…”

“…A complicated control may be required to control the two test phases. In [2,4,6,8] another BIST methods they use simple control logic to generate only deterministic patterns without pseudo-random patterns. Twisted-ring counters (TRC) along with some reseeding logic are employed to generate all the required patterns.…”