1995
DOI: 10.1109/50.390224
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A three-dimensional high-throughput architecture using through-wafer optical interconnect

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Cited by 24 publications
(14 citation statements)
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“…Several planar PCB substrates can in principle be arranged in a linear array, as shown in Fig. 1, and optically interconnected in the 3rd dimension using optical transmission through transparent substrates (i.e., see [7,14,34] for a description of such technologies), yielding a compact 3-dimensional optical mesh-like structure, as shown in Fig. 10c.…”
Section: Scalalability To 2 and 3 Dimensionsmentioning
confidence: 99%
See 1 more Smart Citation
“…Several planar PCB substrates can in principle be arranged in a linear array, as shown in Fig. 1, and optically interconnected in the 3rd dimension using optical transmission through transparent substrates (i.e., see [7,14,34] for a description of such technologies), yielding a compact 3-dimensional optical mesh-like structure, as shown in Fig. 10c.…”
Section: Scalalability To 2 and 3 Dimensionsmentioning
confidence: 99%
“…Space division multiplexing exploits the large 2D spatial bandwidth made available on a single die and the large 3D spatial bandwidth made available through free-space. Figure 2 illustrates one possible organization of the optical backplane, based on the concept of``logically transparent'' processing boards (i.e., also see [7,14,34] for descriptions of optically transparent technologies). The optical backplane channels are created through the use of either imaging optics or 2D microlens arrays between the PCBs, as shown in Fig.…”
Section: Introductionmentioning
confidence: 99%
“…By rethinking the network architecture, new techniques can be incorporated to allow dramatic improvements in overall interconnect performance. A three-dimensional optoelectronic network using hybrid integrated optoelectronic devices and through-wafer transmissions is currently being developed at Georgia Tech [26].…”
Section: Introductionmentioning
confidence: 99%
“…Such 3D packaging solutions improve signaling speed by minimizing the length of chip-to-chip signal paths and improve throughput by maximizing the number of interconnects crossing the network bisection. 3D packaging technologies also enable ultra-compact MPPs [33], [44], [52] for embedded applications by minimizing system volume and footprint.…”
Section: Introductionmentioning
confidence: 99%