A time-mode translinear principle for implementing analog multiplication

D'Angelo, Robert; Sonkusale, Sameer

doi:10.1109/iscas.2014.6865068

Cited by 7 publications

(3 citation statements)

References 12 publications

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“…According to Table III, the important saving in area our circuit achieved is counterbalanced by the increase in power and the reduction in bandwidth. However, this level of static power is still competitive if compared to other analog multipliers which require several hundreds of W [3] [7] [8] [12] [16] [23] or even several mW [6] [12] [24]. On the other hand, although much narrower than those of [9] [10], the -3 dB-bandwidth of our multiplier is satisfactory to the application as a CNN synapse.…”

Section: Vdd Vdd Vdd Vddmentioning

confidence: 94%

Compact CMOS Analog Multiplier Free of Voltage Reference Generators

Sousa

Andrade

Bomfim

et al. 2020

JICS

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This work presents a CMOS four quadrant analog multiplier architecture for application as the synapse element in analog cellular neural networks. For this reason, the circuit has voltage-mode inputs and a current-mode output and the chief design targets are compactness and low energy consumption. A signal application method is proposed that avoids voltage reference generators, which contributes to reduce sensitivity to supply voltage variation. Performance analysis through simulation has been accomplished for a design in CMOS 130 nm technology with 163 µm2 total active area. The circuit features ±50 mV input voltage range, 86 µW static power and ‑28.4 dB maximum total harmonic distortion. A simple technique for manual calibration is also presented.

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Section: Vdd Vdd Vdd Vddmentioning

confidence: 94%

Compact CMOS Analog Multiplier Free of Voltage Reference Generators

Sousa

Andrade

Bomfim

et al. 2020

JICS

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show abstract

“…One example of a TM multiplier and divider circuit has been proposed, but it requires transconductance amplifiers as computational units and, thus, introduces the same limitations experienced in voltage and current mode designs [22]. In [23] we introduced a time-mode translinear principle to achieve a nonlinearity directly in time by exploiting the exponential relationship between voltage and time, just as the traditional translinear principle exploits this relationship between current and voltage. This paper presents a further development of both the theoretical background as well as the implementation issues.…”

Section: Introductionmentioning

confidence: 99%

A Time-Mode Translinear Principle for Nonlinear Analog Computation

D'Angelo

Sonkusale

2015

IEEE Trans. Circuits Syst. I

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This work proposes a novel translinear principle based on time domain processing of signals. The exponential relationship between voltage and time in an RC circuit is exploited to implement a logarithmic voltage-to-time converter and an exponential time-to-voltage converter. These circuits are the time domain analogs of the voltage mode translinear circuits that exploit the exponential relationship between current and voltage in BJTs and subthreshold MOS transistors. Just as Kirchoff's voltage laws provide a natural form of addition for the voltage-mode translinear principle, the progression of time can also be a natural source of addition for the proposed time-mode analog of this principle. In this work a time-mode adder circuit is used to realize a translinear principle in time. This paper describes the theory behind this time-mode translinear principle. Furthermore, the design of nonlinear circuit functions, e.g., multiplication and power law, based on the time-mode translinear principle is described. Simulation and measurement results for a two-input single quadrant multiplier are presented. The chip was fabricated in a 180 nm CMOS process with simulation results agreeing closely with experimental results. We also present error analysis for such circuits and provide a brief discussion on future prospects of this approach.

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“…T2T multiplier schematic ϕ X and ϕ Y are inputs; ϕ out contains the product Analogue multiplication has been traditionally implemented using the translinear principle between current and voltage in a bipolar junction transistor or subthreshold MOSFET [5]. Recently, a time-mode translinear principle has been introduced that allows nonlinear computation on voltage-mode signals using intermediate time-mode variables [6]. However, the circuit introduced in [b] did not take full advantage of the time-mode representation because it required voltage-mode inputs and outputs.…”

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confidence: 99%

Analogue multiplier using passive circuits and digital primitives with time‐mode signal representation

D'Angelo

Sonkusale

2015

Electron. lett.

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A new architecture to multiply signals with time-mode representations is proposed. The exponential relationship between voltage and time in an RC circuit is utilised to implement the time-mode logarithmic and exponential functions needed to realise a time-mode analogue of the translinear principle. The addition of time-mode variables is achieved through the natural progression of time equal to the sum of the input times. By combining these two techniques, an analogue multiplier can be implemented almost exclusively with passive circuits and digital primitives. Therefore, the circuit performance could benefit from CMOS scaling trends. The architecture is described, and simulation results are presented for an operational circuit implementing this approach.

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A time-mode translinear principle for implementing analog multiplication

Cited by 7 publications

References 12 publications

Compact CMOS Analog Multiplier Free of Voltage Reference Generators

Compact CMOS Analog Multiplier Free of Voltage Reference Generators

A Time-Mode Translinear Principle for Nonlinear Analog Computation

Analogue multiplier using passive circuits and digital primitives with time‐mode signal representation

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