A Tools Flow for Synthesis of Asynchronous Control Circuits from Extended STG Specifications

Delsoto, Higor A.; Oliveira, Duarte L.; Batista, Gracieth C.; Silva, Diego Augusto Santos; Romano, Leonardo

doi:10.1109/lascas.2019.8667591

Cited by 3 publications

(1 citation statement)

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“…[14] enables specifications of mixed-mode asynchronous/synchronous systems and arbitration with its modelling primitives, however its level transitions break the STG's consistency property. [15], [16] enables specifications of heterogeneous systems with implicit input and output bursts, but they resolve complete state coding (CSC) conflicts using a different model. [17] synthesises more robust XBMs into quasi-delay insensitive circuits to enable CMOS-UDSM technology, although no verification of the XBMs were included.…”

Section: Introductionmentioning

confidence: 99%

Synthesis of SI Circuits from Burst-Mode Specifications

Chan

Sokolov

Khomenko

et al. 2021

2021 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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In this paper, we present a new workflow that is based on the conversion of Extended Burst-Mode (XBM) specifications to Signal Transition Graphs (STGs). While XBMs offer a simple design entry to specify asynchronous circuits, they cannot be synthesised into speed-independent (SI) circuits, due to the 'burst mode' timing assumption inherent in the model. Furthermore, XBM synthesis tools are no longer supported, and there are no dedicated tools for formal verification of XBMs. Our approach addresses these issues, by granting the XBMs access to sophisticated synthesis and verification tools available for STGs, as well as the possibility to synthesise SI circuits. Experimental results show that our translation only linearly increases the model size and that our workflow achieves a much improved synthesis success rate, with a 33% average reduction in the literal count.

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