A Transient-Enhanced Low-Quiescent Current Low-Dropout Regulator With Buffer Impedance Attenuation

Al-Shyoukh, Mohammad; Lee, Hoi; Rivas-Pérez, Raul

doi:10.1109/jssc.2007.900281

Cited by 351 publications

(200 citation statements)

References 15 publications

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“…The proposed distributed power delivery system features an adaptive current boost bias and an adaptive RC compensation network controlled individually within each LDO regulator, increasing the power efficiency and stability of the overall system over a wide range of load currents and PVT variations. As compared to other stateof-the-art LDO regulators providing fast voltage regulation [8,11,13,15], a single LDO within the proposed power delivery system (including all capacitors and a bias generator) is 2.24 times smaller. The proposed power delivery system delivers 3.9 to 15.8 times more load current, while exhibiting a similar current efficiency.…”

Section: Introductionmentioning

confidence: 92%

“…Under the constraints, (10), (11), and (12), the proposed LDO regulator is a first order system with a phase margin between 45°and 90°(the PM is reduced over three decades by 90°due to p 1 and a portion of 45°due to p 3 ) and a bandwidth f(p 1 ), as shown in Fig. 6.…”

Section: Op Amp Based Ldomentioning

confidence: 99%

“…The quality of the power supply in portable electronic systems can be efficiently addressed with point-of-load distributed power delivery [1,2], which requires the on-chip integration of multiple power supplies. Several low-dropout (LDO) regulators suitable for on-chip integration have recently been fabricated [3][4][5][6][7][8][9][10][11][12][13][14][15][16][17], exhibiting fast load regulation and high current efficiency. Due to these characteristics, the LDO is a key component in on-chip power management.…”

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…Dynamically biased shunt feedback, proposed in [11], has been applied to achieve high current efficiency and system stability over a wide range of load currents. While the impedance-attenuated-buffer in [11] is dynamically biased, the error amplifier in [11] is statically biased, making simultaneous optimization of the LDO speed and current consumption difficult. Alternatively, adaptive biasing techniques have been proposed that boost the bias current during fast output transitions [12,13,18], yielding a promising technique for fast and power efficient load regulation.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Distributed LDO regulators in a 28 nm power delivery system

P.-Vaisband

Price

Köse

et al. 2015

Analog Integr Circ Sig Process

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A fully integrated power delivery system with distributed on-chip low-dropout (LDO) regulators developed for voltage regulation in portable devices and fabricated in a 28 nm CMOS process is described. Each LDO employs adaptive bias for fast and power efficient voltage regulation, exhibiting 64 ps response time of the regulation loop and 99.49 % current efficiency. An adaptive compensation network is also employed within the distributed power delivery system to maintain a stable system response within 25 to 105°C and 10 % voltage variations with a capacitive load of more than 472 pF. No off-chip capacitors are required. Under a 788 mA load current step with 5 ns load edge, the power delivery system exhibits less than 15 % voltage droop for nominal input and output voltages, and a minimum dropout of 0.1 V. Each of the LDO regulators with the adaptive networks and bias current generator occupies 85 lm 9 42 lm in a 28 nm CMOS process. All of the test measurements are performed in a distributed power delivery system of six on-chip LDO regulators within a commercial high performance portable device. The proposed system is the first successful silicon demonstration of stable fully integrated parallel analog LDO regulators.

show abstract

Section: Introductionmentioning

confidence: 92%

Section: Op Amp Based Ldomentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Distributed LDO regulators in a 28 nm power delivery system

P.-Vaisband

Price

Köse

et al. 2015

Analog Integr Circ Sig Process

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A transient‐improved low‐dropout regulator with nested flipped voltage follower structure

Chen

Leung

2012

Circuit Theory & Apps

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In this article, the existing low-dropout regulator (LDO) based on cascoded flipped voltage follower (CAFVF) is reviewed. A new method to simulate the open-loop gain of an LDO with a CAFVF structure is conveyed. The drawback of CAFVF-based LDO is that the nondominant pole locates at low-frequency and pole-zero cancellation using a large equivalent series resistance of loading capacitor is required for stability. To tackle this problem, a novel LDO structure based on a nested CAFVF is proposed and analyzed in this article. It is shown that the nondominant pole is pushed to a high frequency and the LDO stability is improved. The proposed circuit is fabricated using a commercial 0.35-mm CMOS technology, and the load-transient response between 0.5 and 60 mA settles at approximately 5 ms.

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A 300‐mA load CMOS low‐dropout regulator without an external capacitor for SoC and embedded applications

Huang

Duan

Guo

et al. 2017

Circuit Theory & Apps

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This study proposes a 300-mA external capacitor-free low-dropout (LDO) regulator for system-on-chip and embedded applications. To achieve a full-load range from 0 to 300 mA, a two-scheme (a light-load case and a heavy-load case) operation LDO regulator with a novel control circuit is proposed. In the light-load case (0-0.5 mA), only one P-type metal-oxide-semiconductor input-pair amplifier with a 10-pF on-chip capacitor is used to obtain a load current as low as 0. In the heavy-load case (0.5 to 300 mA), both Ptype metal-oxide-semiconductor and N-type metal-oxide-semiconductor differential input-pair amplifiers with an assistant push-pull stage are utilized to improve the stability of the LDO regulator and achieve a high slew rate and fast-transient response. Measurements show an output voltage of 3.3 V and a full output load range from 0 to 300 mA. A line regulation of 1.66 mV/V and a load regulation of 0.0334 mV/mA are achieved. The measured power-supply rejection ratio at 1 kHz is À65 dB, and the measured output noise is only 34 μV. The total active chip size is approximately 0.4 mm 2 with a standard 0.5 μm complementary metal-oxide-semiconductor process.

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A Transient-Enhanced Low-Quiescent Current Low-Dropout Regulator With Buffer Impedance Attenuation

Cited by 351 publications

References 15 publications

Distributed LDO regulators in a 28 nm power delivery system

Distributed LDO regulators in a 28 nm power delivery system

A transient‐improved low‐dropout regulator with nested flipped voltage follower structure

A 300‐mA load CMOS low‐dropout regulator without an external capacitor for SoC and embedded applications

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