A triple-node upset self-healing latch for high speed and robust operation in radiation-prone harsh-environment

Kumar, Sandeep; Mukherjee, Atin

doi:10.1016/j.microrel.2022.114857

Cited by 9 publications

(2 citation statements)

References 26 publications

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“…A system‐level hardening technique called error‐correcting code (ECC) mitigates the effect of SEs in memories; however, as latches are extensively spread across the chip, this approach is inefficient. Moreover, the use of an encoder and decoder in the ECC method increases the overall expenses 5 . Other hardware redundancy methods like modular redundancy, such as triple‐modular redundancy (TMR), and 5‐MR can also mask the SEs; however, the approach is not affordable for resource‐constraint applications 6 .…”

Section: Introductionmentioning

confidence: 99%

“…If two nearby nodes share the charge, it is termed to as double‐node upset (DNU); and SNU‐hardened techniques are inefficient and inadequately robust when DNU happens. Recently, many triple and quad‐node upset hardened latches have also been proposed 1,5,12–14 ; however, SNUs and DNUs are the most prevalent manifestations of the SEUs 1,15 . Moreover, SEs induced by DNUs are becoming more significant, and the rate of such errors in circuits and systems is increasing due to DNUs 16 .…”

Section: Introductionmentioning

confidence: 99%

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Low cost and high performance double‐node upset resilient latch for low orbit space applications

Kumar,

Mukherjee

2023

Circuit Theory & Apps

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SummaryThis paper proposes a double‐node upset complete resilient (DNUCR) latch to meet the requirements of low orbit space applications for high robustness, cost‐effectiveness, and high performance. With the help of its interlocked loops with multiple feedbacks consisting of C‐elements (CE), input splitting CEs, 1P‐2N and 2P‐1N elements, and inverters, the proposed DNUCR latch preserves the original data even after the radiation incident. Error injection simulations in Synopsys HSPICE show that the proposed DNUCR latch recovers from all DNUs and can withstand large amount of injected charge. The simulation outcomes further show that the proposed DNUCR latch outperforms existing DNU‐resilient latches in terms of delay, power consumption, and power–delay–area product (PDAP), with an average of 48% reduction in delay, 22% savings in power, and 60% reduction in PDAP. The proposed DNUCR latch is also found to be the best among the existing radiation‐hardened latches in terms of charge‐to‐PDAP ratio.

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Section: Introductionmentioning

confidence: 99%