A tunable gain and tunable band active balun LNA for IEEE 802.11ac WLAN receivers

Popuri, Suchendranath; Pasupureddi, Vijaya Sankara Rao; Sturm, Johannes

doi:10.1109/esscirc.2016.7598273

Cited by 12 publications

(5 citation statements)

References 10 publications

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“…The analysis has been carried out using Keysight ADS simulation tool. The LNA outperforms existing designs in [8,13,14] at the expense of increased power consumption. Fig.…”

Section: Resultsmentioning

confidence: 97%

Design of Continuously Tunable Low Noise Amplifier for Multiband Radio

Aneja

2017

2017 Mediterranean Microwave Symposium (MMS)

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this paper presents the design of continuously tunable low noise amplifier with frequency tuning range from 2.2 to 2.8 GHz. The amplifier achieves input matching and tunability through a transformer based input matching network. The proposed circuit uses an inductively degenerated common source cascode amplifier to design the amplification stage. The circuit includes a phase shifter circuit to shift the phase of the input signal to achieve tunability through transformer. The LNA achieves a maximum gain of more than 17dB in the entire tuning range. The LNA attains a perfect impedance match across the tuning range and has a stable operation. In addition, it achieves a low noise figure ranging from 1.4dB to 5.2dB.

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“…The analysis has been carried out using Keysight ADS simulation tool. The LNA outperforms existing designs in [8,13,14] at the expense of increased power consumption. Fig.…”

Section: Resultsmentioning

confidence: 97%

Design of Continuously Tunable Low Noise Amplifier for Multiband Radio

Aneja

2017

2017 Mediterranean Microwave Symposium (MMS)

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“…Although, some of the architectures are implemented in CMOS and hence are not directly comparable with the simulated architecture presented in this article. The performance of the front‐end blocks utilized in the Verilog‐AMS model is derived from the know how of the previous implementation . Moreover, all the other implementations do not include the capability to identify the incoming RF signal standard.…”

Section: Performance Results and Discussionmentioning

confidence: 99%

“…The performance of the front-end blocks utilized in the Verilog-AMS model is derived from the know how of the previous implementation. 21 Moreover, all the other implementations 5,7,[9][10][11]14,20 do not include the capability to identify the incoming RF signal standard. The implementation 13 can estimate the standard but lack the capability to change the received standard dynamically.…”

Section: Performance Results and Discussionmentioning

confidence: 99%

A −40‐dB EVM 20‐MHz subsampling multistandard receiver architecture with dynamic carrier detection, bandwidth estimation, and EVM optimization

Kale

Sturm

Pasupureddi

2019

Circuit Theory & Apps

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Summary In this work, a reconfigurable multistandard subsampling receiver with dynamic carrier frequency detection and system‐level EVM optimizations is proposed. Ideal software defined radio (SDR) receivers promise complete flexibility at the expense of high‐performance analog‐to‐digital converters (ADCs) that are challenging to implement in current technologies for low‐power applications. This scenario leads to the research of digital intensive sampling receivers with discrete‐time signal processing (DTSP) implemented in analog domain. This approach makes it feasible to move channel selection filtering and dynamic gain adaptability from analog to digital domain. The proposed receiver employs subsampling down‐conversion along with subband filters to dynamically detect the carrier frequency of the incoming signal, estimate its bandwidth, and identify if the signal is present in one of the target standard bands. This carrier detection provides a unique capability to reconfigure the receiver dynamically. Additionally, in this work, system‐level EVM optimization is proposed considering frequency synthesizer phase noise, IQ mismatch, sampling frequency selection and block‐level gain, noise, and nonlinearity. The RF front end of the proposed receiver is modeled in Verilog‐AMS whereas the digital signal processing is implemented in Simulink‐Matlab. The complete receiver has been verified to detect and process three different bands belonging to three different standards (GSM, UMTS, and WLAN) with the carrier frequency ranging from 0.9 to 2.5 GHz. Test signals with 4‐QAM modulation, maximum bandwidth of 20 MHz, and input‐dynamic range from –109 to –20 dBm is utilized to demonstrate the receiver performance including an EVM of –40 dB.

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“…The OP1dB is preserved with gain variation in this configuration. A resistor is used in a negative feedback configuration, as in [82], which helps control the gain in a continuous manner as depicted in Fig. 14.…”

Section: G Tunable Negative Feedback Capacitormentioning

confidence: 99%

Realizing Joint Communication and Sensing RF Receiver Front-Ends: A Survey

George,

Sen,

Carta

2024

IEEE Access

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Joint Communication and radio Sensing (JC&S) has gained significant attention over the past few years. The advantages of this technology include reduced cost, size and power consumption. With further advancements in JC&S systems, it can potentially be used in next-generation cellular networks, internet-of-things and upcoming applications such as Industry 4.0, where a single system is capable of performing a wide variety of functions or tasks. The inclusion of this technology will result in improved performance and safety of the systems. Even though communication and radio sensing make use of a similar Radio Frequency (RF) front-end, the specifications for both these technologies mainly differ in terms of bandwidth and linearity. In this survey, a detailed study of the specifications of radar and communication was conducted. For the RF front-end to operate efficiently in both radar and communication modes, there must be reconfigurability in terms of frequency, bandwidth, gain and linearity. In this survey, we investigated different frequency, bandwidth, gain and linearity reconfigurable low noise amplifier (LNA) and downconversion mixer architectures. The merits and demerits of each architecture are discussed and a summary of the performance of the reconfigurable LNAs and down-conversion mixers in the literature is presented. Finally, possible topologies for JC&S are deduced based on their performance.INDEX TERMS Frequency reconfiguration, Joint Communication and Sensing, multi-mode LNA, multimode down conversion mixers, reconfigurable RF front-end, variable gain

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A tunable gain and tunable band active balun LNA for IEEE 802.11ac WLAN receivers

Cited by 12 publications

References 10 publications

Design of Continuously Tunable Low Noise Amplifier for Multiband Radio

Design of Continuously Tunable Low Noise Amplifier for Multiband Radio

A −40‐dB EVM 20‐MHz subsampling multistandard receiver architecture with dynamic carrier detection, bandwidth estimation, and EVM optimization

Realizing Joint Communication and Sensing RF Receiver Front-Ends: A Survey

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