A Two-Dimensional Gate Threshold Voltage Model for a Heterojunction SOI-Tunnel FET With Oxide/Source Overlap

Chander, Sweta; Baishya, Srimanta

doi:10.1109/led.2015.2432061

Cited by 42 publications

(15 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…High-κ materials are often used as gate dielectrics [73,74]. Radisavljevic et al used 30 nm HfO 2 as a top gate and single layer MoS 2 as a channel ( Figure 6) [9].…”

Section: Volatile Field-effect Transistor (Fet) Devicesmentioning

confidence: 99%

Interfacing 2D Semiconductors with Functional Oxides: Fundamentals, Properties, and Applications

2017

View full text Add to dashboard Cite

Two-dimensional semiconductors, such as transition-metal dichalcogenides (TMDs) and black phosphorous (BP), have found various potential applications in electronic and opto-electronic devices. However, several problems including low carrier mobility and low photoluminescence efficiencies still limit the performance of these devices. Interfacing 2D semiconductors with functional oxides provides a way to address the problems by overcoming the intrinsic limitations of 2D semiconductors and offering them multiple functionalities with various mechanisms. In this review, we first focus on the physical effects of various types of functional oxides on 2D semiconductors, mostly on MoS 2 and BP as they are the intensively studied 2D semiconductors. Insulating, semiconducting, conventional piezoelectric, strongly correlated, and magnetic oxides are discussed. Then we introduce the applications of these 2D semiconductors/functional oxides systems in field-effect devices, nonvolatile memory, and photosensing. Finally, we discuss the perspectives and challenges within this research field. Our review provides a comprehensive understanding of 2D semiconductors/functional oxide heterostructures, and could inspire novel ideas in interface engineering to improve the performance of 2D semiconductor devices.

show abstract

“…High-κ materials are often used as gate dielectrics [73,74]. Radisavljevic et al used 30 nm HfO 2 as a top gate and single layer MoS 2 as a channel ( Figure 6) [9].…”

Section: Volatile Field-effect Transistor (Fet) Devicesmentioning

confidence: 99%

Interfacing 2D Semiconductors with Functional Oxides: Fundamentals, Properties, and Applications

2017

View full text Add to dashboard Cite

show abstract

“…The 2D Poisson's equation

\frac{\partial^{2} ψ_{i} ((),, x, y)}{\partial x^{2}} + \frac{\partial^{2} ψ_{i} ((),, x, y)}{\partial y^{2}} = - \frac{{italicqN}_{i}}{{normalε}_{i}}

is solved on the devices of Figure using a parabolic approximation of the 2D potential, ψ i (x, y), where, i = 1, 2, 3, 4 corresponds to regions I (− a ≤ x ≤ 0), II (0 ≤ x ≤ b ), III ( b ≤ x ≤ c ), and IV ( c ≤ x ≤ d ), respectively, of the device, regions I, and IV being the junction depletion regions …”

Section: Extraction Of Threshold Voltage In Tfetsmentioning

confidence: 99%

“…Such models, however, must be robust and must be able to respond accurately to a wide range of important device parameters, including dimensions and applied voltage. A number of analytical models on TFETs have been proposed till date, each being derived with objectives of satisfying the variety and variation of different dependent device parameters …”

Section: Introductionmentioning

confidence: 99%

“…3 Numerous strategies have been adopted so far in terms of device geometry and materials in order to address the problem in these tunneling transistors. Of them, double gate (DG) TFETs, 4 heterojunction (HJ) TFETs, [5][6][7][8][9][10] cylindrical TFETs, 11 dual metal gate TFETs, 12 Carbon Nanotube (CNT) TFETs, 13 III-V TFETs, 14 and gate engineered TFETs 15 are the most significant.…”

Section: Introductionmentioning

confidence: 99%

“…A number of analytical models on TFETs have been proposed till date, each being derived with objectives of satisfying the variety and variation of different dependent device parameters. [4][5][6]16 Threshold voltage is a critical electrical parameter in MOS-based devices as it signifies the degree of the gate's influence on the channel. In a TFET which operates by interband tunneling, the threshold voltage represents the gate voltage at which the energy bands at the tunnel junction begin to saturate.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A temperature‐dependent surface potential‐based algorithm for extraction of threshold voltage in homojunction TFETs

Goswami

Bhowmick²

2017

Int J Numerical Modelling

View full text Add to dashboard Cite

In this paper, we propose an algorithm to extract threshold voltage in homojunction tunnel field effect transistors (TFETs). Single gate TFET and double gate TFET are the geometries which are considered for verification of the method. Firstly, a generalized model of surface potential based on 2D Poisson equation for homojunction TFETs is developed. Secondly, the algorithm involves a number of geometrical operations on surface potential plots, which are performed computationally. From the plots of surface potential and the geometrical constructions, a parameter, range_point, is defined through mathematical formulations. The threshold voltage is determined by subjecting the range_point to a set of constraints which are found to be same for both the devices. The validity of the algorithm is confirmed by considering different parameters like drain voltage, gate oxide thickness, and temperature for both low‐k and high‐k gate dielectric materials in TFETs. The temperature variation is validated for a heterojunction TFET too using the same generalized model of surface potential.

show abstract

Lateral Straggle Parameter and Its Impact on Hetero-Stacked Source Tunnel FET

Vanlalawmpuia

Bhowmick

2022

Lecture Notes in Electrical Engineering

View full text Add to dashboard Cite

A Two-Dimensional Gate Threshold Voltage Model for a Heterojunction SOI-Tunnel FET With Oxide/Source Overlap

Cited by 42 publications

References 11 publications

Interfacing 2D Semiconductors with Functional Oxides: Fundamentals, Properties, and Applications

Interfacing 2D Semiconductors with Functional Oxides: Fundamentals, Properties, and Applications

A temperature‐dependent surface potential‐based algorithm for extraction of threshold voltage in homojunction TFETs

Lateral Straggle Parameter and Its Impact on Hetero-Stacked Source Tunnel FET

Contact Info

Product

Resources

About