A Two-Module Linear Regulator with 3.9–10 V Input, 2.5 V Output, and 500 mA Load

Duan, Quanzhen; Li, Weidong; Huang, Shanzhou; Ding, Yuemin; Meng, Zhen; Shi, Kai

doi:10.3390/electronics8101143

Cited by 4 publications

(3 citation statements)

References 20 publications

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“…The peak voltage formed steadily by the LDO regulator can affect the adjacent systems. Therefore, the LDO regulators must always provide a constant output voltage regardless of load current [8][9][10]. Also, the conventional LDO regulators used to achieve this purpose have large external capacitors.…”

Section: Introductionmentioning

confidence: 99%

Design of Capacitor-Less High Reliability LDO Regulator with LVTSCR Based ESD Protection Circuit Using Current Driving Buffer Structure

Kwon

Koo

2022

Electronics

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The peak voltage depending on the load current can be affected by the external capacitors installed in the output stage of the LDO regulator. However, the capacitor-less LDO regulator proposed in this study was applied a current driving buffer structure between the output stage of the error amplifier and the path transistor. Therefore, the proposed LDO regulator maintained a stable output voltage regardless of the load current by controlling an effective overshoot/undershoot voltage. In addition, the proposed LDO regulator has a built-in LVTSCR based on the ESD protection circuit. As most IC circuits are malfunctioned and destroyed by the ESD phenomenon, the reliability was verified through the built-in ESD protection circuit of the proposed LDO regulator. The proposed LDO regulator with the current driving buffer structure can effectively control the peak voltage. As a result of the measurement, the undershoot voltage of 22 mV and the overshoot voltage of 19 mV were maintained when the load current of 250 mA was provided under the conditions of 3.3 V to 4.5 V and the output power voltage of 3 V. The proposed ESD protection circuit is also guaranteed to function at temperatures as high as 500 K.

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Section: Introductionmentioning

confidence: 99%

Design of Capacitor-Less High Reliability LDO Regulator with LVTSCR Based ESD Protection Circuit Using Current Driving Buffer Structure

Kwon

Koo

2022

Electronics

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“…The N-type LDO, in which an NMOS or NPN power transistor is adopted, has a faster transient response and less silicon real estate than the P-type LDO because of the inherent low impedance and high carrier mobility. The main disadvantage of the N-type LDO is the high-dropout voltage [5][6][7][8]. An extra internal charge pump or a second low-power input rail is needed to achieve a low-dropout voltage for N-type LDO [9,10].…”

Section: Introductionmentioning

confidence: 99%

A High-Loop-Gain Low-Dropout Regulator with Adaptive Positive Feedback Compensation Handling 1-A Load Current

Jiang

Wang

et al. 2022

Electronics

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Low-dropout regulators, which have the capabilities of handling large output current and obtaining a superior transient response, are receiving increasing attention. This paper presents a high-output-current low-dropout regulator with high loop gain. An adaptive positive feedback compensation method is presented. It guarantees stability under full load conditions and achieves high loop gain. Without relying on an external zero, a ceramic capacitor with low equivalent series resistance can be employed, resulting in the minimized output voltage variation during the load transient response. In addition, the load regulation and line regulation are both small. An impedance adapting stage is inserted between the error amplifier and power transistor. It is suitable for low-supply voltage applications and drives the power transistor quickly. The simulation results indicate that the proposed LDO can supply a 1000 mA load current with a 200 mV dropout voltage. The load regulation and line regulations are 0.089 μV/mA and 0.562 m V/V, respectively. The power supply rejection is above 75 dB at 1 kHz under the full range of the output current.

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“…In practice, M SW1 is used for the current limit protection while M SW2 is employed to protect against the reverse current. The voltage stabilization loop used to control M SW2 is similar to the LDO structure, but the difference from the traditional LDO is that the dropout voltage of the loop needs to be reduced (<100 mV) to avoid the power loss of the switch itself [2][3][4][5][6][7][8][9][10][11]. Under such a low dropout voltage, the working state of the M SW2 transistor is approximately in the linear region.…”

Section: Introductionmentioning

confidence: 99%

A High-Stability Regulation Circuit with Adaptive Linear Pole–Zero Tracking Compensation for USB Type-C Interface

2022

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We present a high-stability regulation circuit to ensure the safety of a device within a wide range of the back-sink current for a USB Type-C interface application. The proposed adaptive linear pole–zero tracking compensation can linearly compensate for the changes in the back-sink current, thereby adaptively canceling the pole–zero changes caused by the current changes. The simulation results show that the phase margin remains greater than 60°. Meanwhile, the loop bandwidth changes between 45 kHz and 135 kHz, when the current increases from 0 A to 1 A, ensuring excellent loop stability. The high-stability regulation circuit is realized in a standard 180 nm CMOS process with an area of 0.4 mm × 0.6 mm. The chip regulates an output voltage from 4.5 V to 5.5 V with 1 A current capacity and 100 mV maximum dropout voltage with the help of the adaptive linear pole–zero tracking compensation.

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A Two-Module Linear Regulator with 3.9–10 V Input, 2.5 V Output, and 500 mA Load

Cited by 4 publications

References 20 publications

Design of Capacitor-Less High Reliability LDO Regulator with LVTSCR Based ESD Protection Circuit Using Current Driving Buffer Structure

Design of Capacitor-Less High Reliability LDO Regulator with LVTSCR Based ESD Protection Circuit Using Current Driving Buffer Structure

A High-Loop-Gain Low-Dropout Regulator with Adaptive Positive Feedback Compensation Handling 1-A Load Current

A High-Stability Regulation Circuit with Adaptive Linear Pole–Zero Tracking Compensation for USB Type-C Interface

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