A unified analytical continuous current model applicable to accumulation mode (junctionless) and inversion mode MOSFETs with symmetric and asymmetric double-gate structures

Jin, Xiaoshi; Liu, Xi; Wu, Meile; Chuai, Rongyan; Lee, Jung‐Hee; Lee, Jong‐Ho

doi:10.1016/j.sse.2012.08.003

Cited by 57 publications

(14 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…where ( ) is the spatially varying doping distribution in the silicon body (can be continuous or discrete). Consideration of fixed and mobile charge density in a lightly-doped silicon body is required from the accuracy point of view [31,32]. Because, the effect of mobile charge density cannot neglected in the above subthreshold regime [33] and its inclusion in Poisson's equation enhances the model accuracy [55].…”

Section: ) Lu and Taur Model [16]mentioning

confidence: 99%

Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs Shaded Conditions

Ahmed¹,

Saha²

2020

ELS

View full text Add to dashboard Cite

Nowadays, the endlessly increasing demand for faster and complex integrated circuits (IC) has been fuelled by the scaling of metal-oxide-semiconductor field-effect-transistors (MOSFET) to smaller dimensions. The continued scaling of MOSFETs approaches its physical limits due to short-channel effects (SCE). Double-gate (DG) MOSFET is one of the promising alternatives as it offers better immunity towards SCEs and can be scaled to the shortest channel length. In future, ICs can be designed using DG-CMOS technology for which mathematical models depicting the electrical characteristics of the DG MOSFETs are foremost needed. In this paper, a review on n-type symmetric DG MOSFETs models has been presented based on the analyses of electrostatic potential distribution, threshold voltage, and drain-current models. Mathematical derivations of the device models are described elaborately, and numerical simulations are also carried out to validate the replicability of models.

show abstract

Section: ) Lu and Taur Model [16]mentioning

confidence: 99%

Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs Shaded Conditions

Ahmed¹,

Saha²

2020

ELS

View full text Add to dashboard Cite

show abstract

“…Recently, Junctionless (JL) MOS-FET has been proposed which has the similar doping concentration within the channel and source/drain (S/D) regions (Colinge et al 2010;Jin et al 2013). Junctionless (JL) MOSFET has no abrupt junctions between source/ drain (S/D) and channel region which can be seen as n-nn-type (n-channel) or p-p-p-type (p-channel) (Sorée et al 2008;Lee et al 2009) so that it is called Junctionless.…”

Section: Introductionmentioning

confidence: 99%

Novel junctionless electrolyte-insulator-semiconductor field-effect transistor (JL EISFET) and its application as pH/biosensor

et al. 2016

View full text Add to dashboard Cite

of water). The Debye lengths were extracted depending on the concentration of phosphate buffered saline (PBS) solutions in the electrolyte region. In this paper, Junctionless based EISFET has been investigated for its applications as pH sensor and Biosensor. The change in the threshold voltage is considered as the sensing parameter to investigate the sensitivity of the device as pH sensor and biosensor.

show abstract

“…The performance evaluation of [2], the performance of inversion, accumulation, and junctionless mode n-type and p-type Bulk Silicon FinFETs [3], the influence of channel random dopant of JL FETs [4,5], and the device physics of JL FETs with double-gate or surrounding-gate structures [6][7][8][9][10][11][12][13][14][15] have been widely reported. The gate controllability of JL FETs with multi-gate structures such as double-gate, triple-gate, and surrounding-gate shows much better subthreshold characteristics compared to normal planar gate-based JL FETs [6][7][8][9].…”

Section: Introductionmentioning

confidence: 99%

Optimization of saddle junctionless FETs for extreme high integration

Jin

Liu

et al. 2016

J Comput Electron

Self Cite

View full text Add to dashboard Cite

In this work, a saddle junctionless field effect transistors with optimal gate structure is proposed for extreme high integration. The forward and reverse I-V characteristics of the optimal saddle JL FETs have been extensively investigated by analyzing the influence of doping concentration, the height of the source/drain extension region and the gate structure engineering from physical insight. Design optimization has also been performed and the optimal parameters have been proposed.

show abstract

A unified analytical continuous current model applicable to accumulation mode (junctionless) and inversion mode MOSFETs with symmetric and asymmetric double-gate structures

Cited by 57 publications

References 9 publications

Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs Shaded Conditions

Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs Shaded Conditions

Novel junctionless electrolyte-insulator-semiconductor field-effect transistor (JL EISFET) and its application as pH/biosensor

Optimization of saddle junctionless FETs for extreme high integration

Contact Info

Product

Resources

About