A unified approach of PM noise calculation in large RF multitone autonomous circuits

Bolcato, P.; Nallatamby, Jean-Christophe; Larcheveque, R.; Prigent, Michel; Obregon, J.

doi:10.1109/mwsym.2000.861046

Cited by 14 publications

(9 citation statements)

References 8 publications

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“…Equation (25) can be solved by resorting to a Newton-iteration scheme. So doing, at each step a linear equation must be solved whose coefficients matrix is (26) and the partial derivatives in (26) are evaluated at the current approximation (for the -th iteration). If the Newton-iteration scheme converges, both an initial condition on the limit cycle and the cycle period are found and the matrix (27) is the correct sensitivity matrix exhibiting at least one eigenvalue equal to 1.…”

Section: A Shooting Methodsmentioning

confidence: 99%

Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits

Bizzarri

Brambilla

Gajani

2012

IEEE Trans. Circuits Syst. I

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Steady state simulation and noise analysis are two essential tools for circuit designers. The algorithms currently available in commonly used simulators are basically limited to the analysis of analog circuits that can be modeled by Lipschitz continuous functions. This is a strong restriction, since current applications are often naturally described by mixed analog-digital models; these models are only piece-wise continuous and Lipschitz condition is not satisfied in the breakpoints. In this paper we propose a method to overcome this limitation by showing how circuits in this class, and, in general, circuits showing discontinuities, can be modeled as hybrid systems. Conventional steady state and noise analysis methods are then extended to this class of circuits. A method to identify the discontinuity points, that, in general, are not known a priori in circuit analysis, is also proposed. With this last addition the method is fully automated and does not require any user intervention

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Section: A Shooting Methodsmentioning

confidence: 99%

Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits

Bizzarri

Brambilla

Gajani

2012

IEEE Trans. Circuits Syst. I

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“…In this case, during the simulation of the PLL with the VCO-DIV, the additional equation (13) is solved for ∆θ noise,vco (t) by the simulator, with ∆θ 1 (t) obtained as in (11).…”

Section: B Device-noise Analysismentioning

confidence: 99%

“…We are motivated in creating a phase model just for the VCO and divider (seen as a single oscillator) since the perturbation theory on oscillators is robust [13], while doing so for the other PLL's blocks might require simplifications on the circuit's behavioral model, resulting in a loss of accuracy with respect to transistor-level simulations. Besides, our methodology is based on well-known analyses in the circuit simulation area, i.e., SST computation-based methods (Harmonic Balance (HB) [9] or the Shooting method [10]) and SST noise analyses (the conversion matrix method [11], [12] or the perturbation projection vector (PPV) [13], [14]) for the construction of the phase macromodel, so that designers could be able to validate it with a little effort. The creation of the phase model can be done, e.g., in Verilog-A language, enriching it with equations and input parameters we provide here, together with guidelines for our procedure, with some remarks on how to automate it.…”

mentioning

confidence: 99%

Fast and Accurate Time-Domain Simulations of Integer-N PLLs

Luca

Bolcato

Larcheveque

et al. 2017

IEEE Trans. Circuits Syst. I

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Abstract-We present a methodology to simulate industrial integer-N phase-locked loops (PLLs) at a verification level, as accurate as and faster than transistor-level simulation. The accuracy is measured on the PLL factors of interest, i.e., locking time, power consumption, phase noise and jitter (period and long-term). The speedup factor tends to the division ratio N for device-noise simulations. We develop a unifying technique which is able to deal with both noise-free and device-noise analyses, taking into account nonlinear and second-order effects visible at transistor-level simulation only, whereas previous works focused on one of the two analyses, separately. The procedure is based on oscillator's sensitivity analysis and on the creation of a phase macromodel for the voltage-controlled oscillator (VCO) together with the loop divider (the phase model is called VCODIV), whilst the other PLL's blocks remain at transistor level. The macromodel's phase law is characterized by a piecewise linear curve, representing the sensitivity of the VCODIV output's phase deviation with respect to the voltage variation of the VCO's control pin, and by the effects of all the VCO's and divider's noise sources on the model's output. We show two experiments on industrial PLLs, and provide guidelines for designers which highlight the steps needed to implement the methodology by using well-known analyses in circuit simulation and Verilog-A for the creation of the macromodel.

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“…Circuit simulations have been successively carried out with a time domain Monte Carlo (TDMC) simulator, which avoid linearization [25], and a frequency domain simulator developed in our laboratory which performs the phase noise calculation using the Conversion Matrices Method (C.M.M.) [20], [26], [27]. The noise analysis in the frequency domain is derived from HB method by a linearization of the nonlinear network equation around the steady state solution to construct a linear periodically time varying model of the oscillator circuit.…”

Section: Oscillator Phase Noise Analysismentioning

confidence: 99%

“…Be careful, an inaccurate steady state solution can lead to inaccurate phase noise simulation results near the carrier [27]. Ignoring this numerical problem of steady state solution accuracy on the phase noise calculation has been a great source of confusion in the past!…”

Section: Oscillator Phase Noise Calculation By Means Of Cmmmentioning

confidence: 99%

Semiconductor device and noise sources modeling: design methods and tools oriented to nonlinear H.F. oscillator CAD

et al. 2004

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Designing oscillator circuits at RF and microwaves requires specific knowledge in extremely varied fields of electronics.The following items will be the core of the presentation: -The physical processes leading to low-frequency noise in semi-conductor devices and the nonlinear behavior of the noise sources in large signal operating conditions will be detailed -Transistor modeling: A special emphasis will be put on the low-frequency noise modeling associated to the nonlinear transistor models. -Simulations tools: In order to simulate accurately the phase noise in free-running nonlinear oscillator circuits, the frequency domain approach based on the conversion matrices formalism which is related to the harmonic balance formalism will be detailed. -Design rules for low phase noise operation Theoretical conditions to be fulfilled by the circuit will be detailed on the basis of the Leeson analysis revisited. The need of new characterizations and extraction methods of noise sources in actual transistors, for a better prediction of noise performances of nonlinear circuits will be recalled.

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A unified approach of PM noise calculation in large RF multitone autonomous circuits

Cited by 14 publications

References 8 publications

Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits

Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits

Fast and Accurate Time-Domain Simulations of Integer-N PLLs

Semiconductor device and noise sources modeling: design methods and tools oriented to nonlinear H.F. oscillator CAD

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