A universal hardware API for authenticated ciphers

Homsirikamol, Ekawat; Diehl, William; Ahmed, Faraz; Farahmand, Farnoud; Sharif, Malik Umar; Gaj, Kris

doi:10.1109/reconfig.2015.7393283

Cited by 9 publications

(17 citation statements)

References 4 publications

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“…Since protected AES implementations in [29,30], and all of this research, use a similar TI-protection strategy leveraging 8-bit datapaths and field inversions in Tower Fields, one can infer that this TI-protection technique is relatively efficient. In this research, we examine implementations of CAESAR Round 3 candidate authenticated ciphers which are fully (or nearly-fully) compliant with the CAESAR HW API for Authenticated Ciphers [9,10]. The version of ACORN at [19] enables a close-to-optimal protection against DPA using threshold implementations, since it uses a small datapath width (i.e., 8 bits), and has a maximum of two cascaded and gates in its nonlinear state update computation path.…”

Section: Discussionmentioning

confidence: 99%

“…The adoption by the CAESAR Committee of the CAESAR HW API for Authenticated Ciphers enables the definition of an interface which is applicable to all CAESAR-candidate authenticated ciphers, and is readily compatible with our DPA test bench and benchmarking processes. This API, available at [9,10], includes a protocol for all required authenticated cipher operations, as summarized above. The API also specifies an AXI-compatible external interface, shown in Figure 11, and further described in [41].…”

Section: Methodsmentioning

confidence: 99%

“…We use an existing Test Vector Leakage Assessment (TVLA) methodology (i.e., t-test, further discussed in "Materials and Methods") [6,7], and upgrade the Flexible Open-source workBench fOr Side-channel analysis (FOBOS) [8], to perform TVLA on authenticated ciphers. The FOBOS interface with the victim cipher implementation is standardized by leveraging the CAESAR Hardware Applications Programming Interface (API) for Authenticated Ciphers, which was adopted by the CAESAR committee in May 2016 [9,10]. Additionally, our use of the CAESAR Hardware API Development Package, available at [11] enables a repeatable and exportable test methodology for all CAESAR candidates.…”

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confidence: 99%

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Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers

et al. 2018

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Authenticated ciphers, which combine the cryptographic services of confidentiality, integrity, and authentication into one algorithmic construct, can potentially provide improved security and efficiencies in the processing of sensitive data. However, they are vulnerable to side-channel attacks such as differential power analysis (DPA). Although the Test Vector Leakage Assessment (TVLA) methodology has been used to confirm improved resistance of block ciphers to DPA after application of countermeasures, extension of TVLA to authenticated ciphers is non-trivial, since authenticated ciphers have expanded input and output requirements, complex interfaces, and long test vectors which include protocol necessary to describe authenticated cipher operations. In this research, we upgrade the FOBOS test architecture with capability to perform TVLA on authenticated ciphers. We show that FPGA implementations of the CAESAR Round 3 candidates ACORN, Ascon, CLOC (with AES and TWINE primitives), SILC (with AES, PRESENT, and LED primitives), JAMBU (with AES and SIMON primitives), and Ketje Jr.; as well as AES-GCM, are vulnerable to 1st order DPA. We then use threshold implementations to protect the above cipher implementations against 1st order DPA, and verify the effectiveness of countermeasures using the TVLA methodology. Finally, we compare the unprotected and protected cipher implementations in terms of area, performance (maximum frequency and throughput), throughput-to-area (TP/A) ratio, power, and energy per bit (E/bit). Our results show that ACORN consumes the lowest number of resources, has the highest TP/A ratio, and is the most energy-efficient of all DPA-resistant implementations. However, Ketje Jr. has the highest throughput.

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Section: Discussionmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

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Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers

et al. 2018

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“…The paper describing the API for hardware implementations (Homsirikamol et al, 2015) also presents the performance results and API overhead for eight CAESAR candidates. This presented data will be discussed in details in the results section.…”

Section: Related Workmentioning

confidence: 99%

“…Although functional software requirements have been set for the CAESAR candidates, details of the hardware Application Programming Interface (API) have not yet been specified. However, the GMU Hardware API, which was introduced to provide a basis for benchmarking the hardware implementations of the CAESAR candidates, is considered as a standard amongst the hardware implementers of the CAE-SAR candidates (Homsirikamol et al, 2015). This API provides specifications for the interface (AEADcore) of the authenticated cipher-core as well as the communication protocol needed.…”

Section: Introductionmentioning

confidence: 99%

FPGA Implementation of HS1-SIV

Geltink

Volokitin

2016

Proceedings of the 13th International Joint Conference on E-Business and Telecommunications

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This work describes a hardware implementation of HS1-SIV with regular cipher parameter settings for the second round of the CAESAR competition. The implementation encompasses both the HS1-SIV hardware implementation, which is conforming to the specifications of the authenticated cipher, as well as a hardware API. The implemented API is conforming to the specifications of the GMU Hardware API for authenticated ciphers. On the target device Xilinx Virtex-7, using Xilinx XST High Level Synthesis, we achieved a throughput of 122.20 Mbit/s and an area of 103,214 LUTs with the data length of the message and the associated data set at 64 bytes and the data length of the key set at 32 bytes. Our performance results suggest that the area overhead of the API is between 8% (8-byte data length) and 15% (2048-byte data length) in comparison the the cipher-core.• the number of bytes used by the hashing algorithm, which is equal to 64 bytes;• the collision level of the hashing algorithm, which 41 is equal to 4 bytes;• the number of internal rounds of the steam cipher, which is equal to 12 bytes;

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RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two

Diehl

Gaj

2016

2016 Euromicro Conference on Digital System Design (DSD)

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A universal hardware API for authenticated ciphers

Cited by 9 publications

References 4 publications

Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers

Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers

FPGA Implementation of HS1-SIV

RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two

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