A versatile 30V analog CMOS process in a 0.18&amp;#x03BC;m technology for power management application

Choi, Yong-Keon; Park, Il-Yong; Lim, Hyun-Chol; Kim, Miyoung; Yoon, Chul-Jin; Kim, Nam-Joo; Yoo, Kicheon; Hutter, Lou N.

doi:10.1109/ispsd.2011.5890830

Cited by 10 publications

(2 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In addition, higher voltage DECMOS is provided for applications requiring up to 20-30 V (Chap. 7) [29]. Equally important in analog CMOS is the extensive characterization needed on all components to document the second-and third-order effects, such as matching, temperature coefficients, and voltage coefficients (Chaps.…”

Section: Analog Cmos Technologymentioning

confidence: 99%

The World Is Analog

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

Self Cite

View full text Add to dashboard Cite

As digital processing extends to more products, an ever-increasing number of analog integrated chips are required. This is because analog processing is essential in allowing the benefits of digital processing to be realized by providing the interface between the real world (analog) and the computer (digital). This chapter covers the diversity of analog applications and voltage requirements, and gives a high-level overview of the many process technologies and components that are encountered in the analog world.

show abstract

Section: Analog Cmos Technologymentioning

confidence: 99%

The World Is Analog

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

Self Cite

View full text Add to dashboard Cite

show abstract

“…They are used in analog and power management designs where high drain-to-source voltages are required. These voltages can range from 20 to 40 V in 130-nm and 180-nm processes, and from 5 to 8 V in 65-nm processes and beyond [29,30]. In DEMOS transistors, however, the gate-to-source voltage is limited by the CMOS gate oxide thickness which remains unchanged.…”

Section: Design and Characteristics Of Demosmentioning

confidence: 99%

High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

Self Cite

View full text Add to dashboard Cite

This chapter focuses mainly on the drain-extended MOS transistor, DEMOS, for high voltage applications, and on the lateral double-diffused MOS transistor, LDMOS, for high power applications. In both cases, the drain is extended with a lightly-doped region, referred to as the drift region, to sustain the high voltage. The chapter begins with an analysis of the drift region and its optimization, typically by reduced surface-field (RESURF) techniques. The transistor switching performance is then analyzed, followed by a discussion of DEMOS and LDMOS design considerations and characteristics. High-voltage and high-current effects are then described, including quasi-saturation, body current, on-state breakdown, and safe operating area (SOA). The chapter concludes with selected high-voltage device applications. IntroductionThe MOSFETs discussed in Chap. 6 are designed for digital, analog, mixed-signal, and RF applications that operate in the low-to-medium voltage range of about 0.8-6 V. Many analog applications, however, require transistors that can handle voltages above 20 V and currents in the ampere range. Those transistors are referred to as high-voltage and power transistors. This chapter provides a comprehensive analysis of the drain-extended MOS transistor (DEMOS), for high-voltage and low-current applications, and the lateral double-diffused MOS (LDMOS) transistor, LDMOS, for power applications. (The "D" in LDMOS describes the sequential (double) diffusion of boron and arsenic through the same oxide opening, defining a precise channel length (Chap. 9). The "L" means that the current path is parallel to the silicon surface (lateral), as opposed to "V" in VDMOS where the current is nearly vertical to the silicon surface.) Schematic cross sections of both transistors (Table 7.1). The DEMOS is typically processed without added process complexity, whereas the LDMOS requires optimization of the P-body and N-drift regions to achieve high voltages and currents while minimizing the drain-to-source resistance and transistor area.The interest in bipolar, CMOS, and DMOS (BCD) technologies has been driven primarily by the proliferation of portable electronics, automotive electronics, and the need for energy efficiency. These applications cluster around different operating points, with 24 V for portable electronics; 60 V for automotive, solar, and LED backlighting; 85 V for power over Ethernet; 120 V for telecommunication; and 700 V for offline LED lighting, consumer, and industrial applications. As a result, BCD is now the technology of choice to realize power ICs by most integrated device manufacturers (IDM) and foundries [1][2][3][4][5].This chapter focuses mainly on transistors with voltage capabilities in the range of 20-700 V, where the bulk of the product applications lie.

show abstract

Process Integration

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

View full text Add to dashboard Cite

A versatile 30V analog CMOS process in a 0.18μm technology for power management application

Cited by 10 publications

References 3 publications

The World Is Analog

The World Is Analog

High-Voltage and Power Transistors

Process Integration

Contact Info

Product

Resources

About