A very low output resistance and wide-swing class-AB level-shifted folded flipped voltage follower cell

Jindal, Caffey; Pandey, Rishikesh

doi:10.1016/j.vlsi.2021.05.001

Cited by 7 publications

(5 citation statements)

References 19 publications

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“…The practical implementation is depicted in Fig. 5b; it includes class AB FVFs [17] as the buffers (marked in dashed rectangles); however, other class AB topologies have been reported [18]- [30]. Again, the differential input voltages are reflected at the terminals of 𝑅 𝑘 and the induced current 𝑖 𝑅 𝑘 is mirrored to the output terminal by means of transistors M7-M10.…”

Section: Proposed Capacitance Multipliermentioning

confidence: 99%

Impedance-mode capacitance multiplier with OTA-based flipped voltage follower for high accuracy and large multiplication factor

Padilla-Cantoya

Gurrola-Navarro

Bonilla-Barragan

et al. 2022

IEICE Electron. Express

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A capacitance multiplier with large multiplication factor, increased accuracy, and class AB operation is presented. The multiplier is an impedance mode implementation consisting of a Flipped Voltage Follower based on Operational Transconductance Amplifiers (OTA). This gives the possibility to offer rail-to-rail operation and class AB operation to drive demanding loads depending on the application. In addition, one of the OTAs is designed to offer a transconductance gain based on passive resistors and achieve increased accuracy in the multiplication factor by means of proper layout techniques. The circuit was implemented in a 0.5µm technology and has multiplication factors of 10, 100, 1k and 10k, a power dissipation of 0.56 mW and a silicon area of 0.059 mm 2 . Simulation and experimental results of the multiplier demonstrate the proper operation.

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Section: Proposed Capacitance Multipliermentioning

confidence: 99%

Impedance-mode capacitance multiplier with OTA-based flipped voltage follower for high accuracy and large multiplication factor

Padilla-Cantoya

Gurrola-Navarro

Bonilla-Barragan

et al. 2022

IEICE Electron. Express

View full text Add to dashboard Cite

show abstract

“…Equation (30) shows that there is single zero and three poles in the transfer function which are written as…”

Section: Transfer Function (Ai(s)) and Bandwidth (𝛚 𝐨 )mentioning

confidence: 99%

“…The proposed current mirror has two separate loops at its input and output stages. According to the open-loop analysis at the input stage (FVF cell) done in Ref [30], the FVF cell is found to be stable. The output stage's open-loop analysis (super cascode structure) shows three poles at nodes 'D12', 'D13', and 'D14'.…”

Section: Stability Analysismentioning

confidence: 99%

“…But these techniques suffer from the limitation of special fabrication steps. The flipped voltage follower (FVF) cell is another useful technique that is extensively used in analog circuits to make them work at low supply voltage [26][27][28][29][30]. Basically, FVF cell is an improved version of voltage follower as it is cascode amplifier with negative feedback and unity gain.…”

Section: Introductionmentioning

confidence: 99%

“…A current mirror using folded FVF cell [30] has been suggested in this paper. The presented current mirror shows very low input resistance as the chosen FVF cell provides very low output resistance node where input current is given.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

High-performance flipped voltage follower based low input resistance current mirror with wide current mirroring range and high output resistance

Jindal

Pandey

2022

Preprint

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This paper presents a high performance current mirror with a large current mirroring range. The advantages of folded flipped voltage follower (FVF) cell and super cascode transistor are combined in proposed current mirror, which make it suitable for high performance applications. The folded FVF cell provides low resistance node which is utilized to inject the input current and therefore, proposed current mirror shows input resistance of 24.15 Ω. By employing a super cascode transistor at the output node, the output resistance is increased to 28.3 G. The presented current mirror achieves bandwidth of 280 MHz and wide current mirroring range of 0 to 500 µA. The suggested current mirror is designed using CMOS technology at 0.18 µm in virtuoso, and it is simulated using Cadence’s spectre. The physical layout has been made using the layout XL editor. The efficiency of the proposed current mirror is shown by post-layout simulation results.

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A wide-swing class-AB level-shifted bulk-driven folded flipped voltage follower cell with the low output resistance

Jindal¹,

Pandey²

2022

Analog Integr Circ Sig Process

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A very low output resistance and wide-swing class-AB level-shifted folded flipped voltage follower cell

Cited by 7 publications

References 19 publications

Impedance-mode capacitance multiplier with OTA-based flipped voltage follower for high accuracy and large multiplication factor

Impedance-mode capacitance multiplier with OTA-based flipped voltage follower for high accuracy and large multiplication factor

High-performance flipped voltage follower based low input resistance current mirror with wide current mirroring range and high output resistance

A wide-swing class-AB level-shifted bulk-driven folded flipped voltage follower cell with the low output resistance

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