Proceedings of the 2001 Conference on Asia South Pacific Design Automation - ASP-DAC '01 2001
DOI: 10.1145/370155.370326
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A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance

Zhaozhi Yang
1
,
Zeyi Wang
2
,
Shuzhou Fang
3
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Cited by 3 publications
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