A W-Band Low-Noise PLL With a Fundamental VCO in SiGe for Millimeter-Wave Applications

Kang, Shin‐Won; Chien, Jun-Chau; Niknejad, Ali M.

doi:10.1109/tmtt.2014.2345342

Cited by 66 publications

(29 citation statements)

References 31 publications

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“…In the lowfrequency bands (<10 GHz), the tank is dominated by the Q of the inductor (Q L ). However, as the frequency increases to higher than 10 GHz, the Q of the varactors (Q var ) decreases significantly [12]. Thus, the Q var determines the overall tank at the millimeter-wave frequencies because Q var is far less than…”

Section: B Design For Low Phase N Oisementioning

confidence: 99%

“…This is particularly important when simulating bipolar VCOs at millimeter-wave frequencies, the transistor model must capture selfheating and avalanche multiplication, which are two positive feedback phenomena that cause significant nonconvergence problems at large voltage swings. During the transient simulations, the impedance of the Sparameter signal source is set to a small value (i.e., [10][11][12][13][14][15][16][17][18][19][20], to clearly reflect the expected effective resistance of the tank inductance at the oscillation frequency, and thus to allow for the onset of oscillations to occur.…”

Section: B Design For Low Phase N Oisementioning

confidence: 99%

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A 32 GHz Low-Power Low-Phase-Noise VCO Implemented in SiGe BiCMOS Technology

Qi¹,

He²,

Shen³

2017

JCM

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A low-phase-noise, low-power Ka-band Voltage-Controlled Oscillator (VCO) using cross-coupled pair configuration is presented. The Ka-band VCO circuit uses 0.18 μm SiGe BiCMOS technology. The VCO has low phase noise of-114.6 dBc/Hz at 1 MHz offset from 32.12 GHz carrier frequency and can be tuned from 30.17 to 33.48 GHz. The figure of merit is-202.1 dBc/Hz. The power consumption of the VCO with 0.27 mm 2 chip area is 1.8 mW from a 1.5 V power supply.

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Section: B Design For Low Phase N Oisementioning

confidence: 99%

Section: B Design For Low Phase N Oisementioning

confidence: 99%

A 32 GHz Low-Power Low-Phase-Noise VCO Implemented in SiGe BiCMOS Technology

Qi¹,

He²,

Shen³

2017

JCM

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“…In the presented PLL, see Fig. 2, a Gilbert mixer type of phase detector (PD) [17][18][19] is instead used. A drawback of using this type of phase detector compared to a PFD is the reduced input phase range, which in the PD is p radians [19] and in the PFD 4p radians [13].…”

Section: Phase Detector and Phase Control Designmentioning

confidence: 99%

“…The phase detector (PD) [12][13][14][15][16] is using a Gilbert type architecture [17][18][19]. The loop filter is implemented as an active filter followed by a passive RC link [17].…”

Section: Introductionmentioning

confidence: 99%

A 28 GHz SiGe PLL for an 81–86 GHz E-band beam steering transmitter and an I/Q phase imbalance detection and compensation circuit

Tired

Sjöland

Sandrup

et al. 2015

Analog Integr Circ Sig Process

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This paper presents two circuits, a complete 1.5 V 28 GHz SiGe beam steering PLL and a standalone 28 GHz QVCO with I/Q phase imbalance detection and compensation. The circuits were designed in a SiGe process with f T = 200 GHz. The PLL is intended to be used for beam steering in an 81-86 GHz E-band transmitter. Phase control is implemented by DC current injection at the output of a Gilbert architecture phase detector showing a simulated phase control sensitivity of 1.2°/lA over a range close to 180°. The simulations use layout parasitics for the QVCO, frequency divider, and phase detector, and an electromagnetic model for the QVCO inductors. The divider is implemented with four cascaded divide-by-two current-mode-logic blocks for a reference frequency of 1.75 GHz. For closed loop simulations of PLL noise and stability, the QVCO is represented with a behavior model with added phase noise. This simulation technique enabled faster simulation time of the PLL. The PLL in band phase noise at 1 MHz offset equals -115 dBc/Hz. Excluding output buffers, the entire PLL consumes 52 mW plus a minimum 7 mW from a variable high voltage supply required to extend the PLL locking range. The measured phase noise of the standalone QVCO equals -100 dBc/Hz at 1 MHz offset. Since E-band radio links utilize higher order QAM modulation, the bit-error rate is sensitive to I/Q phase error. In the measured standalone QVCO with I/Q phase imbalance detection and compensation, the error is detected in two cross coupled active mixers that have an output DC level proportional to the phase error. The error can then be eliminated adjusting the bias of four varactors connected to the QVCO outputs. The current consumption of the chip equals 14 mA from a 1.5 V supply and 57 mA from a 2.5 V supply dedicated to the detector and 28 GHz output measurement buffers.

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“…Conventionally, the W-band circuit blocks are mainly realized by III-V or SiGe technologies to take advantage of the superior transistor characteristics [1], [2]. Recently, the rapid progress with impressive device frequency response in CMOS technology has enabled fully integrated solutions with low cost, low power, and high integration level for the emerging applications in W-band [3].…”

Section: Introductionmentioning

confidence: 99%

A 76.2–89.1 GHz Phase-Locked Loop With 15.6% Tuning Range in 90 nm CMOS for W-Band Applications

Tan

Chu

Hsu

2015

IEEE Microw. Wireless Compon. Lett.

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In this letter, a wide tuning range W-band phase-locked loop (PLL) in 90 nm CMOS is presented. A novel frequency tripling topology with a single cross-coupled pair and a dual tank is proposed for the voltage-controlled oscillator (VCO) to achieve wide tuning characteristics under low power consumption. The locking range of the PLL at the fundamental tone is 25.4-29.7 GHz, and an excellent tuning range at the third harmonic frequency up to 12.9 GHz (from 76.2 to 89.1 GHz, 15.6%) is obtained. Under a 1.2 V supply voltage , the measured closed-loop phase noise of the PLL is 83.5 dBc/Hz at 78.34 GHz. To the best of our knowledge, the achieved turning range is the highest currently reported for the PLLs operating in a similar frequency range in CMOS technology.Index Terms-Phase-locked loop (PLL), tripler, voltage-controlled oscillator (VCO), W-band, wideband.

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A W-Band Low-Noise PLL With a Fundamental VCO in SiGe for Millimeter-Wave Applications

Cited by 66 publications

References 31 publications

A 32 GHz Low-Power Low-Phase-Noise VCO Implemented in SiGe BiCMOS Technology

A 32 GHz Low-Power Low-Phase-Noise VCO Implemented in SiGe BiCMOS Technology

A 28 GHz SiGe PLL for an 81–86 GHz E-band beam steering transmitter and an I/Q phase imbalance detection and compensation circuit

A 76.2–89.1 GHz Phase-Locked Loop With 15.6% Tuning Range in 90 nm CMOS for W-Band Applications

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