A wide linear range CMOS OTA and its application in continuous-time filters

Kumar, Tangudu Bharat; Kar, Sanjeeb Kumar; Boolchandani, Dharmendar

doi:10.1007/s10470-020-01621-0

Cited by 16 publications

(6 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Therefore, to mitigate this issue, a source-degenerated auxiliary differential pair (SDADP) was used to improve the linear range of G m , which improved the performance of the CTDSM proposed in this study. The simulation results in [10] successfully verified this SDADP structure after implementation in a continuous-time filter. Upon successful simulation verification, this SDADP structure was further applied to a high resolution delta-sigma modulator to complete the chip test.…”

Section: Introductionmentioning

confidence: 55%

A 2.16-μW Low-Power Continuous-Time Delta–Sigma Modulator With Improved-Linearity Gₘ for Wearable ECG Application

Kim

Duan

Choi

et al. 2022

IEEE Trans. Circuits Syst. II

View full text Add to dashboard Cite

This study presents a 2.16 µW low-power third-order single-bit continuous-time delta-sigma modulator (CTDSM) for electrocardiogram (ECG) signal acquisition application. The proposed CTDSM uses an active-RC (A-RC) integrator as a first integrator and an improved linearized Gm-C integrator for the second and third integrators, respectively. The mixed-integrator structure helps to mitigate the trade-offs between power consumption and resolution. Moreover, a sourcedegenerated auxiliary differential pair circuit is used for the Gm-C integrators to improve their linearity. By using A-RC and Gm-C integrators together along with an improved-linearized Gm block, the total power consumption was measured as 2.16 µW with a peak signal-to-noise ratio of 80.1 dB, signal-to-noise, and distortion ratio of 78.4 dB, and a dynamic range of 81.4 dB with a bandwidth of 250 Hz. Furthermore, a real-time ECG signal was successfully captured in an ECG acquisition system that consisted a heart-rate sensor and a signal acquisition circuit, including the proposed CTDSM.

show abstract

Section: Introductionmentioning

confidence: 55%

A 2.16-μW Low-Power Continuous-Time Delta–Sigma Modulator With Improved-Linearity Gₘ for Wearable ECG Application

Kim

Duan

Choi

et al. 2022

IEEE Trans. Circuits Syst. II

View full text Add to dashboard Cite

show abstract

“…[1][2][3][4][5][6][7][8][9] Numerous circuits like current conveyors, 10 voltage-controlled oscillators, 11 linear regulators, 12,13 switchedcapacitor circuit, 14 low-dropout regulator 15 and liquid crystal display drivers, [16][17][18] micro-electromechanical system sensors, 19 multipliers 20 use OTA for implementing their functionality. Indeed, important circuits like programmable gain amplifiers, 21,22 variable gain amplifiers, 21 filters, [23][24][25] modulators, 26,27 and transimpedance amplifiers 28,29 use OTAs to form systems on chip. In such systems, OTA is expected to improve current utilization and reduce power consumption, noise and voltage requirements.…”

Section: Introductionmentioning

confidence: 99%

“…35 Several CMOS OTA structures with improved linearity have been successfully employed in designing filters. 24,25,36 One of the best examples of THD improvement is the differential biasing technique based OTA reported by Sanchez et al 37 which improves linear range as well as dynamic range (DR) while maintaining common mode and transconductance. However, a trade-off needs to be established between THD and gain of OTA.…”

Section: Introductionmentioning

confidence: 99%

“…Besides this, the total harmonic distortion ( THD ) is an important parameter used to quantify the harmonics present in the voltage waveforms 35 . Several CMOS OTA structures with improved linearity have been successfully employed in designing filters 24,25,36 . One of the best examples of THD improvement is the differential biasing technique based OTA reported by Sanchez et al 37 which improves linear range as well as dynamic range ( DR ) while maintaining common mode and transconductance.…”

Section: Introductionmentioning

confidence: 99%

“…The low voltage operation of OTA can be established by using bulk‐driven 38 and bulk‐driven floating‐gate 39 MOSFETs in input stage as well by using self cascode MOSFETs as tail devices. The extensive literature survey executed for OTA establishes the fact that circuit designers still face challenge of accomplishing combination of high‐gain, high gain‐bandwidth ( GBW ), low THD , low IRN , low power, low settling time ( ST ) and low voltage operation 24,25,36,39,40 …”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Design of low‐voltage low‐noise operational transconductance amplifiers for low frequency applications

Sharma,

Kumar,

Madan

et al. 2024

Int J Numerical Modelling

View full text Add to dashboard Cite

Low‐noise and low‐voltage operation is prime requirement of an operational transconductance amplifier for low frequency applications. However, achieving low‐noise operation at low supply voltages is a challenging task in CMOS technology owing to noise‐power and noise‐stability tradeoffs. This article outlines, the design of four differential bias self‐cascode (DBSC) operational transconductance amplifiers (OTAs) working at ±0.7 V. The four design techniques namely gate driven (GD), bulk driven (BD), bulk driven quasi‐floating gate (BDQFG), and gate driven quasi floating bulk (GDQFB) have been applied on DBSC OTAs. The designing aspects and performance parameters of these four OTAs such as gain, gain‐bandwidth, input referred noise (IRN), settling time (ST), common mode rejection ratio (CMRR), total harmonic distortion, input impedance, transconductance, power consumption, area consumption and process/mismatch variations have been fairly compared in this work. These DBSC OTAs have been designed and simulated using a standard 0.18‐μm 6M1P CMOS N‐well process. The results infer GD DBSC OTA shows high CMRR of 125.83 dB. While the BD DBSC OTA consumes very low power of 0.2 μW. The BDQFG DBSC OTA shows low 1% ST of 24.83 μS. The GDQFB DBSC OTA show high transconductance (2.35 mS), high gain (64.97 dB), and low IRN (0.40 μV/√Hz at 10 Hz). The theoretical predictions for these OTAs agree with the post‐layout simulations. The proposed OTAs can be used for designing various analog circuits such as programmable gain amplifiers, variable gain amplifiers, and transimpedance amplifiers for low‐frequency biomedical and health care applications.

show abstract

Design of Low Power Two-Stage OTA Based Second-Order Gm-C Filter for Fast Locking PLL Based Frequency Synthesizer

Jana

Govil

2022

Lecture Notes in Electrical Engineering

View full text Add to dashboard Cite

A wide linear range CMOS OTA and its application in continuous-time filters

Cited by 16 publications

References 19 publications

A 2.16-μW Low-Power Continuous-Time Delta–Sigma Modulator With Improved-Linearity Gₘ for Wearable ECG Application

A 2.16-μW Low-Power Continuous-Time Delta–Sigma Modulator With Improved-Linearity Gₘ for Wearable ECG Application

Design of low‐voltage low‐noise operational transconductance amplifiers for low frequency applications

Design of Low Power Two-Stage OTA Based Second-Order Gm-C Filter for Fast Locking PLL Based Frequency Synthesizer

Contact Info

Product

Resources

About