A Wide Locking-Range Frequency Divider for LMDS Applications

Abstract

A fully integrated frequency divider with an operation frequency up to 20 GHz is designed in 0.18-m CMOS technology. The frequency divider includes two stages to divide the input signal by a factor of 4. A wide locking range from 18.8 to 23.2 GHz was obtained with a low phase noise of 134 8 dBc/Hz(1-MHz offset) at an output frequency of 4.7 GHz. The first stage is designed by an analog methodology with the varactors to extend the locking range, while the second stage is designed by a digital approach with the RF devices for a high operation frequency. With the advantages of both designs, this frequency divider is operated at the frequency range suitable for LMDS applications.

A Survey on Dynamic Corrective Control of Asynchronous Sequential Machines

“…Motivated by the aforementioned features of space-borne digital systems, researchers have successfully applied various existent corrective control schemes to building robust space-borne digital systems subject to faults. In broad terms, the case study systems with which fault-tolerant corrective controllers yield convincing experimental results are classified into six types: asynchronous error counters including error detection and correction (EDAC) counters for on-board computers (OBCs) of satellite systems and asynchronous clock dividers [93][94][95][96]; scrubbing schedulers for memory including Johnson counters in satellite SSDR systems [97][98][99]; payload data and operation managers [100,101]; ROM controllers for OBC [102]; configuration controllers for FPGA [103][104][105]; and asynchronous TMR memory [90,106]. The utilized modeling formalisms of ASMs, considered fault types, and relevant publications regarding these case study systems are summarized in Table 1.…”