A wideband high efficiency V-band 65 nm CMOS power amplifier with neutralization and harmonic controlling

This paper presents a Ka-band 4-way combining power amplifier (PA) implemented in 65nm CMOS process. A T-type power combiner with loaded capacitors is proposed, which is cascaded with transformer-based power combiner to form a hybrid power combiner. The hybrid combiner can combine the output power of 4-way differential PAs into one channel compactly, and makes them achieve optimal load matching. The measured saturation output power (Psat), output 1dB compression point (OP1dB) and maximum power added efficiency (PAEmax) are 23dBm, 18.9dBm and 27% at 35GHz respectively. It achieves a 3dB bandwidth of 30.7GHz-38.5GHz within a core area of 0.26mm 2 .

Section: Single Stage Amplifier With Neutralizing Capacitorsmentioning

confidence: 99%

A Ka-band 23dBm power amplifier based on 4-way parallel-series power combiner with loaded capacitors in 65-nm CMOS

Zhang²,

Lv³

et al. 2021

“…8. To enable easy layout routing for separate dc biases of the LNA last stage and the mixer, a transformer is used to function as an inductive T-shaped network [11,12]. Fig.…”

Section: Down-conversion Mixer and If Buffermentioning

confidence: 99%

Design of a 60-GHz receiver front-end with broadband matching techniques in 65-nm CMOS

Chai

Cui

2018

A 60-GHz CMOS receiver front-end with wide IF bandwidth is presented. The receiver front-end consists of an LNA, a down-conversion mixer and an IF buffer. In order to support both channel-bonding and singlechannel operations, two types of broadband inter-stage matching networks are analyzed from a new perspective and adopted in the design. Fabricated in a 65-nm CMOS process, the receiver front-end achieves wide IF bandwidth, a 39-dB gain, and a 5-dB noise figure in the high-gain mode. In Channel-2 measurement, the receiver front-end achieves a maximum 3-dB IF bandwidth of 6.83 GHz, which covers three channels and meets the channelbonding bandwidth requirement.

“…However, the LNA in CMOS still has many difficulties in attaining high gain and becomes a power-consuming block when the operating frequency enters the millimeter-wave regime. The neutralization technique has been a useful and popular method in the amplifier design to provide higher signal magnification [15,16,17,18,19,20,21,22,23,24,25]. Nevertheless, it is still not an effective way to make maximum use of the active devices.…”

Section: Introductionmentioning

confidence: 99%

A high gain 79-GHz low noise amplifier using inductor-embedded neutralization technique

Cheng

Mei

et al. 2021

This paper presents a 79 GHz low noise amplifier (LNA) design featuring high gain fabricated in a 40-nm CMOS process. To make better use of active devices, we propose an inductor-embedded neutralization technique. The implemented prototype consists of four-stage common-source amplifiers using the proposed technique and transformer-based matching networks. The measurement results show that the amplifier realizes a peak gain of 23 dB at 79 GHz with 14.4 mW power dissipation and 0.4 mm 2 area occupation. The LNA achieves a minimum noise figure (NF) of 6.3 dB.