This study introduces an innovative chip-upending technique to enhance the quality of silicon nitride waveguides by minimizing sidewall roughness, which is critical for reducing optical propagation losses. By reflowing the resist after development, we effectively control the resist expansion effect typically observed in standard procedures. Our analysis indicates that this method can decrease line edge roughness (LER). We employ atomic force microscopy (AFM) to measure the LER of the resist and the waveguide sidewalls via a special tilting technique, ensuring precise characterization of the surface topography. The fabrication is carried out by the choice of a suitable DOE for ensuring the statistical robustness in the evaluation process. Additionally, we conduct propagation and bend loss measurements at 850 nm across waveguides of various widths, with thicknesses ranging from 200 to 400 nm. These measurements in correlation with the roughness analysis confirms that sidewall roughness is indeed smoothed, resulting in notable improvements in light propagation efficiency. The versatility of the low-temperature reflow process is further demonstrated by its compatibility with several waveguide geometry alterations . The inclusion of tree-based modeling in optimizing relevant parameters in the fabrication, foremost the reflow parameters, thereby contributing to a more efficient and controlled reflow process. The findings suggest that our approach can be universally adopted for the fabrication of low-loss waveguides in photonic integrated circuits, with necessary wafer-to-wafer stability.