Abnormal enhancement of interface trap generation under dynamic oxide field stress at MHz region

Zhu, Shiyang; Nakajima, Akira; Ohashi, Takuo

doi:10.1063/1.1857083

Cited by 2 publications

(4 citation statements)

References 14 publications

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“…Therefore, similar frequency dependence can be expected as that revealed in (10). However, because the X species in nMOSFETs are probably charged and their diffusion is electrical field dependent, the time evolutions of ∆N it for nMOSFETs under the dc, unipolar, and bipolar stresses differ from (5), (8), and (10), with the exponent n larger than 0.25 [25].…”

Section: B Empirical Model For Interface Trap Generation Under Variosupporting

confidence: 62%

See 1 more Smart Citation

Mechanism of Dynamic Bias Temperature Instability in p- and nMOSFETs: The Effect of Pulse Waveform

Zhu

Nakajima

Ohashi³

2006

IEEE Trans. Electron Devices

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The waveform effect on dynamic bias temperature instability (BTI) is systematically studied for both p-and nMOSFETs with ultrathin SiON gate dielectrics by using a modified direct-current current-voltage method to monitor the stress-induced interface trap density. Interface traps are generated at the inversion gate bias (negative for pMOSFETs and positive for nMOSFETs) and are partially recovered at the zero or accumulation gate bias. Devices under high-frequency bipolar stress exhibit a significant frequency-dependent degradation enhancement. Approximate analytical expressions of the interface trap generation for devices under the static, unipolar, or bipolar stress are derived in the framework of conventional reaction-diffusion (R-D) model and with an assumption that additional interface traps (N * it) are generated in each cycle of the dynamic stress. The additional interface trap generation is proposed to originate from the transient trapped carriers in the states at and/or near the SiO 2 /Si interface upon the gate voltage reversal from the accumulation bias to the inversion bias quickly, which may accelerate dissociation of Si-H bonds at the beginning of the stressing phase in each cycle. Hence, N * it depends on the interface-state density, the voltage at the relaxation (i.e., accumulation) bias, and the transition time of the stress waveform (the fall time for pMOSFETs and the rise time for nMOSFETs). The observed dynamic BTI behaviors can be perfectly explained by this modified R-D model.

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Section: B Empirical Model For Interface Trap Generation Under Variosupporting

confidence: 62%

“…The abnormal ∆N it enhancement at some special frequencies (2.5 and 4.5 MHz) in Fig. 7 can be probably attributed to the resonant tunneling via near-interface states, as we have observed in nMOSFETs under high-frequency bipolar stresses at megahertz region [25].…”

Section: Mechanism Of the Additional Interface Trap Generation Undsupporting

confidence: 54%

Mechanism of Dynamic Bias Temperature Instability in p- and nMOSFETs: The Effect of Pulse Waveform

Zhu

Nakajima

Ohashi³

2006

IEEE Trans. Electron Devices

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“…The abnormal ∆N it enhancement at some special frequencies (2.5 and 4.5 MHz) in Fig. 19 can be probably attributed to the resonant tunneling via near-interface states, as we observed in nMOSFETs under high-frequency bipolar stresses at MHz region (45).…”

Section: Mechanism Of the Additional Interface Trap Generation Under ...supporting

confidence: 52%

“…However, since the X species in nMOSFETs are probably charged and their diffusion is electrical field dependent, the time evolutions of ∆N it for nMOSFETs under the dc, unipolar, and bipolar stresses differ from Eqs. 14, 17, and 19 with the exponent n larger than 0.25 (45).…”

Section: Measurement Detailsmentioning

confidence: 96%

Mechanism of Static and Dynamic Bias Temperature Instability in p- and n-MOSFETs

Nakajima

Zhu

2007

ECS Trans.

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The BTI-induced degradation of device performance has been ascribed to interface trap generation (ΔNit) and oxide charge buildup (ΔNot) at or near the SiO2/Si interface. Moreover, it has been widely recognized that degradation under dynamic BTI stressing may differ from that under static stressing. In this paper, our recent studies on BTI are reviewed. First, a modified direct-current current-voltage (DCIV) method is proposed, which can monitor ΔNit and ΔNot separately, and is independent on the measurement temperature. Second, negative BTI in pMOSFETs with ultrathin plasma-nitrided SiON gate dielectrics is systematically studied, as well as the effect of nitrogen concentration, using the modified DCIV method. Third, dynamic BTI with is studied at various stressing configurations. A transient degradation enhancement is observed upon quick gate voltage reversal from the accumulation bias to the inversion bias. Finally, a modified reaction-diffusion model is proposed to consistently explain the observed static and dynamic BTI behavior.

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Abnormal enhancement of interface trap generation under dynamic oxide field stress at MHz region

Cited by 2 publications

References 14 publications

Mechanism of Dynamic Bias Temperature Instability in p- and nMOSFETs: The Effect of Pulse Waveform

Mechanism of Dynamic Bias Temperature Instability in p- and nMOSFETs: The Effect of Pulse Waveform

Mechanism of Static and Dynamic Bias Temperature Instability in p- and n-MOSFETs

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