Abstract Interpretation of Combinational Asynchronous Circuits

Abstract

Abstract.A technique, based upon abstract interpretation, is presented that allows general gate-level combinational asynchronous circuits with uncertain delay characteristics to be reasoned about. Our approach is particularly suited to the simulation and model checking of circuits where the identification of possible glitch states (static and dynamic hazards) is required. A hierarchy of alternative abstractions linked by Galois connections is presented, each offering varying tradeoffs between accuracy and complexity. Many of these abstract domains resemble extended, multi-value logics: transitional logics that include extra values representing transitions as well as steady states, and static/clean logics that include the values S and C representing 'unknown but fixed for all time' and 'can never glitch' respectively.

Temporal Abstract Domains

“…To my knowledge, the only other works where the time is not abstracted as a discrete notion during the static analysis are the one of O. Bouissou and M. Martel in [6] as well as the one by S. Thompson and A. Mycroft, who proposed in [15] several abstractions to study asynchronous circuits and the changes counting domain we introduce has similarities with their work. The abstract time is reduced to a temporal relation between events.…”

Rewriting semantics of production rule sets

“…This yields a more efficient analysis of hazard free operation, since the high-level design has a smaller state space than the more detailed, low-level design. [28] uses the modern program analysis technique of abstract interpretation to reason about hazards in asynchronous circuits. [29] uses a standard symbolic model checker to verify hazard free operation of speed-independent circuits, and an older tool called prlint [6] purports to exhaustively check hazard free operation of a production rule set.…”