Accelerating an iterative eigensolver for nuclear structure configuration interaction calculations on GPUs using OpenACC

Maris, Pieter; Yang, Chao; Oryspayev, Dossay; Cook, Brandon

doi:10.1016/j.jocs.2021.101554

Cited by 8 publications

(10 citation statements)

References 26 publications

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“…The aim of this code inlining was grouping more loops in order to use the collapse directive and achieve a higher level of parallelism. A similar approach is used for sparse matrix multiplication in [10]. Finally, applications like SpMV with an irregular memory access pattern required loop unrolling.…”

Section: Discussionmentioning

confidence: 99%

“…The OpenACC programming model has been used to parallelize scientific applications in numerous fields. OpenACC has been extensively used to parallelize simulations in nuclear physics [10,15]. A hybrid MPI/OpenACC implementation of an iterative eigensolver for many-body calculations can be found in [10].…”

Section: Related Workmentioning

confidence: 99%

“…OpenACC has been extensively used to parallelize simulations in nuclear physics [10,15]. A hybrid MPI/OpenACC implementation of an iterative eigensolver for many-body calculations can be found in [10]. The implementation was derived from a previous OpenMP-based solution.…”

Section: Related Workmentioning

confidence: 99%

“…OpenACC offers an implicit, descriptive-based programming model [10]. The programmer annotates code segments that should be executed in parallel on the accelerator device.…”

Section: Openacc Programming Modelmentioning

confidence: 99%

“…Also, performance portability remains high, as not all hardware details are exposed to the programmer. Many programmers find the directive-based approach useful, as it preserves the flexibility of running parallel code both on the CPUs and the GPUs, while also avoiding vendor-specific language lock-in [10].…”

Section: Introductionmentioning

confidence: 99%

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An Evaluation of Directive-Based Parallelization on the GPU Using a Parboil Benchmark

Đukić,

Mišić

2023

Electronics

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Heterogeneous architectures consisting of both central processing units and graphics processing units are common in contemporary computer systems. For that reason, several programming models have been developed to exploit available parallelism, such as low-level CUDA and OpenCL, and directive-based OpenMP and OpenACC. In this paper we explore and evaluate the applicability of OpenACC, which is a directive-based programming model for GPUs. We focus both on the performance and programming effort needed to parallelize the existing sequential algorithms for GPU execution. The evaluation is based on the benchmark suite Parboil, which consists of 11 different mini-applications from different scientific domains, both compute- and memory-bound. The results show that mini-apps parallelized with OpenACC can achieve significant speedups over sequential implementations and in some cases, even outperform CUDA implementations. Furthermore, there is less of a programming effort compared to low-level models, such as CUDA and OpenCL, because a majority of the work is left to the compiler and overall, the code needs less restructuring.

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Section: Discussionmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

“…OpenACC offers an implicit, descriptive-based programming model [10]. The programmer annotates code segments that should be executed in parallel on the accelerator device.…”

Section: Openacc Programming Modelmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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An Evaluation of Directive-Based Parallelization on the GPU Using a Parboil Benchmark

Đukić,

Mišić

2023

Electronics

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Evaluating the potential of disaggregated memory systems for HPC applications

Ding,

Maris,

Nam

et al. 2024

Concurrency and Computation

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SummaryDisaggregated memory is a promising approach that addresses the limitations of traditional memory architectures by enabling memory to be decoupled from compute nodes and shared across a data center. Cloud platforms have deployed such systems to improve overall system memory utilization, but performance can vary across workloads. High‐performance computing (HPC) is crucial in scientific and engineering applications, where HPC machines also face the issue of underutilized memory. As a result, improving system memory utilization while understanding workload performance is essential for HPC operators. Therefore, learning the potential of a disaggregated memory system before deployment is a critical step. This paper proposes a methodology for exploring the design space of a disaggregated memory system. It incorporates key metrics that affect performance on disaggregated memory systems: memory capacity, local and remote memory access ratio, injection bandwidth, and bisection bandwidth, providing an intuitive approach to guide machine configurations based on technology trends and workload characteristics. We apply our methodology to analyze thirteen diverse workloads, including AI training, data analysis, genomics, protein, fusion, atomic nuclei, and traditional HPC bookends. Our methodology demonstrates the ability to comprehend the potential and pitfalls of a disaggregated memory system and provides motivation for machine configurations. Our results show that eleven of our thirteen applications can leverage injection bandwidth disaggregated memory without affecting performance, while one pays a rack bisection bandwidth penalty and two pay the system‐wide bisection bandwidth penalty. In addition, we also show that intra‐rack memory disaggregation would meet the application's memory requirement and provide enough remote memory bandwidth.

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