Accelerating Fully Homomorphic Encryption in Hardware

Doröz, Yarkın; Öztürk, Erdinç; Sunar, Berk

doi:10.1109/tc.2014.2345388

Cited by 76 publications

(48 citation statements)

References 13 publications

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“…An FPGA implementation of a multiplier for the GH FHE scheme was proposed by Wang and Huang [19] and is stated to be about twice as fast as the previously mentioned GPU implementation [13]. Further to this, an ASIC design of the full GH FHE scheme, without key generation, is proposed in [20]. Timings show this ASIC implementation is considerably faster than the original implementation in software [7] and also the encryption and recrypt steps are faster than for the GPU platform implementation [13].…”

Section: Introductionmentioning

confidence: 99%

High-Speed Fully Homomorphic Encryption Over the Integers

Cao

Moore

O’Neill

et al. 2014

Financial Cryptography and Data Security

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Abstract. A fully homomorphic encryption (FHE) scheme is envisioned as a key cryptographic tool in building a secure and reliable cloud computing environment, as it allows arbitrary evaluation of a ciphertext without revealing the plaintext. However, existing FHE implementations remain impractical due to very high time and resource costs. To the authors' knowledge, this paper presents the first hardware implementation of an encryption primitive for FHE over the integers using FPGA technology. A large-integer multiplier architecture utilising Integer-FFT multiplication is proposed, and a large-integer Barrett modular reduction module is designed incorporating the proposed multiplier. The encryption primitive used in the integer-based FHE scheme is designed employing the proposed multiplier and modular reduction modules. The designs are verified using the Xilinx Virtex-7 FPGA platform. Experimental results show that a speed improvement factor of up to 44 is achievable for the hardware implementation of the FHE encryption scheme when compared to its corresponding software implementation. Moreover, performance analysis shows further speed improvements of the integer-based FHE encryption primitives may still be possible, for example through further optimisations or by targeting an ASIC platform.

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Section: Introductionmentioning

confidence: 99%

High-Speed Fully Homomorphic Encryption Over the Integers

Cao

Moore

O’Neill

et al. 2014

Financial Cryptography and Data Security

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“…The proposed work uses 33.8K LUTs (11.2%), 15.7K DFFs (2.6%), 227.5 BRAMs (22%) and 476 DSPs (17%). There is a plethora of works reported in the literature about multiplication of two large degree polynomials using NTT-based multiplication schemes [21], [22], [20], [23], [24]. Although some of these works also perform different operations, we only reported the hardware and performance results for polynomial multiplication part of these works.…”

Section: Results and Comparisonmentioning

confidence: 99%

Design and Implementation of a Fast and Scalable NTT-Based Polynomial Multiplier Architecture

Mert

Öztürk

Savaş

2019

2019 22nd Euromicro Conference on Digital System Design (DSD)

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In this paper, we present an optimized FPGA implementation of a novel, fast and highly parallelized NTTbased polynomial multiplier architecture, which proves to be effective as an accelerator for lattice-based homomorphic cryptographic schemes. As I/O operations are as time-consuming as NTT operations during homomorphic computations in a host processor/accelerator setting, instead of achieving the fastest NTT implementation possible on the target FPGA, we focus on a balanced time performance between the NTT and I/O operations. Even with this goal, we achieved the fastest NTT implementation in literature, to the best of our knowledge. For proof of concept, we utilize our architecture in a framework for Fan-Vercauteren (FV) homomorphic encryption scheme, utilizing a hardware/software co-design approach, in which polynomial multiplication operations are offloaded to the accelerator via PCIe bus while the rest of operations in the FV scheme are executed in software running on an off-the-shelf desktop computer. Specifically, our framework is optimized to accelerate Simple Encrypted Arithmetic Library (SEAL), developed by the Cryptography Research Group at Microsoft Research [1], for the FV encryption scheme, where large degree polynomial multiplications are utilized extensively. The hardware part of the proposed framework targets Xilinx Virtex-7 FPGA device and the proposed framework achieves almost 11x latency speedup for the offloaded operations compared to their pure software implementations. We achieved a throughput of almost 800K polynomial multiplications per second, for polynomials of degree 1024 with 32-bit coefficients.

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“…This prompted researchers to find a solution that can deal with a large number of modular multiplications. Therefore, there are some works focusing particularly on this problem using the customized ASICs [Doröz et al 2013;Doröz et al 2015a]. In spite of the potential of GPU and ASIC solutions, most of the proposed studies are based on the reconfigurable hardware, specifically FPGA.…”

Section: Implementations Of Swhe and Fhe Schemesmentioning

confidence: 99%

A Survey on Homomorphic Encryption Schemes

et al. 2018

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Legacy encryption systems depend on sharing a key (public or private) among the peers involved in exchanging an encrypted message. However, this approach poses privacy concerns. The users or service providers with the key have exclusive rights on the data. Especially with popular cloud services, the control over the privacy of the sensitive data is lost. Even when the keys are not shared, the encrypted material is shared with a third party that does not necessarily need to access the content. Moreover, untrusted servers, providers, and cloud operators can keep identifying elements of users long after users end the relationship with the services. Indeed, Homomorphic Encryption (HE), a special kind of encryption scheme, can address these concerns as it allows any third party to operate on the encrypted data without decrypting it in advance. Although this extremely useful feature of the HE scheme has been known for over 30 years, the first plausible and achievable Fully Homomorphic Encryption (FHE) scheme, which allows any computable function to perform on the encrypted data, was introduced by Craig Gentry in 2009. Even though this was a major achievement, different implementations so far demonstrated that FHE still needs to be improved significantly to be practical on every platform. Therefore, this survey focuses on HE and FHE schemes. First, we present the basics of HE and the details of the well-known Partially Homomorphic Encryption (PHE) and Somewhat Homomorphic Encryption (SWHE), which are important pillars of achieving FHE. Then, the main FHE families, which have become the base for the other follow-up FHE schemes are presented. Furthermore, the implementations and recent improvements in Gentry-type FHE schemes are also surveyed. Finally, further research directions are discussed. This survey is intended to give a clear knowledge and foundation to researchers and practitioners interested in knowing, applying, as well as extending the state of the art HE, PHE, SWHE, and FHE systems.

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Accelerating Fully Homomorphic Encryption in Hardware

Cited by 76 publications

References 13 publications

High-Speed Fully Homomorphic Encryption Over the Integers

High-Speed Fully Homomorphic Encryption Over the Integers

Design and Implementation of a Fast and Scalable NTT-Based Polynomial Multiplier Architecture

A Survey on Homomorphic Encryption Schemes

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