2019
DOI: 10.14778/3342263.3342634
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Accelerating raw data analysis with the ACCORDA software and hardware architecture

Abstract: The data science revolution and growing popularity of data lakes make efficient processing of raw data increasingly important. To address this, we propose the ACCelerated Operators for Raw Data Analysis (ACCORDA) architecture. By extending the operator interface (subtype with encoding) and employing a uniform runtime worker model, ACCORDA integrates data transformation acceleration seamlessly, enabling a new class of encoding optimizations and robust high-performance raw data processing. Together, these key fe… Show more

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Cited by 15 publications
(5 citation statements)
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References 52 publications
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“…However, their presented PUs can't process one character per cycle and must be replicated extensively to achieve a high throughput, hence requiring a lot of resources. ACCORDA [3] tries to improve the processing of raw unstructured data with dedicated Hardware Accelerators. The authors show that their unstructured data processor can parse and filter JSON data for all common predicates, but is in return again very resource intensive.…”
Section: Related Workmentioning
confidence: 99%
“…However, their presented PUs can't process one character per cycle and must be replicated extensively to achieve a high throughput, hence requiring a lot of resources. ACCORDA [3] tries to improve the processing of raw unstructured data with dedicated Hardware Accelerators. The authors show that their unstructured data processor can parse and filter JSON data for all common predicates, but is in return again very resource intensive.…”
Section: Related Workmentioning
confidence: 99%
“…Similarly, the ACCORDA [16] proposal for integrating a specialized SQL operator engine into the memory hierarchy, and the Oracle SPARC M7 "Software in Silicon" accelerator, operate on the stream of data between DRAM and processor cache, while ACCI connects a programmable accelerator for arbitrary tasks to the coherent interconnect. Nevertheless, there are similarities which show the value of the functionality all these systems provide.…”
Section: Related Workmentioning
confidence: 99%
“…This effectively turns the FPGA into a smart memory management unit, treating FPGA memory as memory in a different NUMA node and returning results directly into the L2 cache of the requesting core, much as a read or write operation over conventional memory would do. This use case offers a nice contrast to existing work implementing similar functionality in restricted settings such as the garbage collection accelerator implemented as part of a RISC-V processor architecture [30] or ACCORDA, a near-memory accelerator prototyped on an FPGA and intended to be inserted on the path between caches and CPUs to offload SQL data processing [16]. For reasons of space, we leave other, more complex use cases that involve manipulating coherency for future work.…”
Section: Introductionmentioning
confidence: 99%
“…Although, to our knowledge not yet used with disaggregated memory, the idea mirrors a growing trends to push SQL operators near the data, until now mostly to storage [43,72]. Even more ambitious are accelerators embedded in the data path between memory and CPU caches [29,35], which can filter data as it is read from memory to reduce data movement and cache pollution. Finally, in the cloud, systems like Amazon's AQUA [21] use SSDs attached to FPGAs to implement a caching layer for RedShift that supports SQL filtering operations and operator push-down to minimize the amount of data movement from storage to the processing nodes.…”
Section: Efficient Data Movementmentioning
confidence: 99%
“…Such designs do not address the overhead of moving large data sets to the CPU, only to have most of it filtered or projected out. Specialized hardware between memory and the CPU has even been proposed to filter data as early as possible, minimizing bus congestion and cache pollution [12,35].…”
Section: Introductionmentioning
confidence: 99%