Acceleration of Simulated Fault Injection Using a Checkpoint Forwarding Technique

Abstract

Simulated fault injection (SFI) is widely used to assess the effectiveness of fault tolerance mechanisms in safety-critical embedded systems (SCESs) because of its advantages such as controllability and observability. However, the long test time of SFI due to the large number of test cases and the complex simulation models of modern SCESs has been identified as a limiting factor. We present a method that can accelerate an SFI tool using a checkpoint forwarding (CF) technique. To evaluate the performance of CF-based SFI (CF-SFI), we have developed a CF mechanism using Verilog faultinjection tools and two systems under test (SUT): a single-core-based co-simulation model and a triple modular redundant co-simulation model. Both systems use the Verilog simulation model of the OpenRISC 1200 processor and can execute the embedded benchmarks from MiBench. We investigate the effectiveness of the CF mechanism and evaluate the two SUTs by measuring the test time as well as the failure rates. Compared to the SFI with no CF mechanism, the proposed CF-SFI approach reduces the test time of the two SUTs by 29%-45%.

Enhanced Soft Error Rate Estimation Technique for Aerospace Electronics Safety Design via Emulation Fault Injection

“…(3) Simulation-based fault injection is a mechanism that analyzes faults by injecting faults during the simulation of the hardware design code [22][23][24][25]. The representative methods include the saboteur method of synthesizing a fault module within the design code, a method of introducing a fault provided within a simulation, such as "force," and Single-event effects (SEEs) on the configuration memory bits of an SRAM-based FPGA have persistent effects and can only be modified when a new bitstream is loaded into the FPGA.…”