Access resistance reduction in Ge nanowires and substrates based on non-destructive gas-source dopant in-diffusion

Abstract

This alone has created the need to develop a radically new, nondestructive method for doping. Doping alters the electrical properties of a semiconductor, related to the access resistance. Low access resistance is necessary for high performance technology and reduced power consumption. In this work the authors reduced access resistance in top-down patterned Ge nanowires and Ge substrates by a non-destructive dopant in-diffusion process. Furthermore, an innovative electrical characterisation methodology is developed for nanowire and fin-based test structures to extract important parameters that are related to access resistance such as nanowire resistivity, sheet resistance, and active doping levels. Phosphine or arsine was flowed in a Metalorganic Vapour Phase Epitaxy reactor over heated Ge samples in the range of 650-700 C. Dopants were incorporated and activated in this single step. No Ge growth accompanied this process. Active doping levels were determined by electrochemical capacitance-voltage free carrier profiling to be in the range of 10 19 cm À3 . The nanowires were patterned in an array of widths from 20-1000 nm. Cross-sectional Transmission Electron Microscopy of the doped nanowires showed minimal crystal damage. Electrical characterisation of the Ge nanowires was performed to contrast doping activation in thin-body structures with that in bulk substrates. Despite the high As dose incorporation on unpatterned samples, the nanowire analysis determined that the P-based process was the better choice for scaled features.

Organo-arsenic Molecular Layers on Silicon for High-Density Doping

“…[1][2] Conventional dopant technologies, such as ion implantation, are problematic for advanced non-planar devices, e.g. fin field effect transistors (finFET) due to the intrinsically high-energy nature of the bombardment process at the surface.…”

Chemical approaches for doping nanodevice architectures

“…Duffy and co-workers built on the work carried out by Long et al [45] by using an MOVPE-based process to deposit monolayers of P and As on Ge substrates and nanowire devices. [46] Figure 14 (a) shows chemical concentration vs. depth profiles as extracted from SIMS analysis on samples with deposited AsH3. A higher thermal treatment temperature was more effective at incorporating As at the cost of a much deeper junction depth.…”

“…A higher temperature is shown to be more effective for P incorporation with both P and As species producing similar results in the larger devices while P-doped fins exhibited better electrical characteristics for the smaller-scaled devices. Reproduced from ref: [46] with permission from The Royal Society of Chemistry.…”

P-type $δ$-doping with Diborane on Si(001) for STM Based Dopant Device Fabrication

“…Definition of atomically sharp dopant profiles is a challenge in device fabrication as scaling of electronic devices approaches the few nanometer range [1][2][3][4] . Limits in achievable doping densities and unwanted diffusion of the dopants into the channel, impact both access resistance and variability of today's semiconductor devices.…”