To extract the coupling capacitance between any two neighbouring through-silicon vias (TSVs) in three-dimensional integrated circuits, most publications use the relation between the inductance matrix and the capacitance matrix (per unit length). However, this relation is based on a homogeneous surrounding medium assumption. It is shown that the previous assumption is inaccurate due to the fact that each TSV is actually surrounded by a non-homogeneous medium (silicon and silicon dioxide materials). The theory behind this claim is provided and validated using ANSYS Q3D. The percentage error in coupling capacitance between the Q3D extraction results and the homogeneous medium model results can reach 70%.