Accurate Current Estimation for Interconnect Reliability Analysis

Abstract

An improved and efficient method for static estimation of average and root-mean-squared currents used for electromigration (EM) reliability analysis is presented in this work. Significantly different from state-of-the-art, the proposed method gives closed-form expressions for average and RMS currents in one complete cycle. The proposed method can be readily configured to work with different combinations of ramp and exponential waveforms. Subsequently, the inadequacies of using conventional EM-severity metrics: either the net's lumped capacitance or the net's effective capacitance, along with the regular timing slew, for EM analysis are outlined. As a correction, and, application of proposed method, we provide formulations for deriving the effective "EM" slew, which can be used with conventional approaches to accurately compute the currents. Further, unlike traditional wisdom, we note that not just the RMS current, but even the total charge transfer can depend on the waveform type, and propose formulations to that regard. Additionally, for the first time, we present a method for incorporating the driver's dynamic IR drop while computing RMS currents. Alongside, we lay recommendations for ensuring the standard-cell EM safety at chip level. Finally, we share model-validation results from a production 40 nm design, enabling a 40% higher performance closure.

A Fast and Retargetable Framework for Logic-IP-Internal Electromigration Assessment Comprehending Advanced Waveform Effects

“…To a great extent, the C load model in itself can be used for accurate estimation of average current density, and is largely independent of resistive effects [3], provided the rail-to-rail swings for the output net.…”

“…The effect of RC load [ Fig. 2(b)] for signal EM reliability was addressed earlier in [3]. It was further established that resistive shielding cannot be accounted using the traditional C eff approach, derived from timing constraints.…”

“…L2: Inability to comprehend RC loads [ Fig. 2(b)] and to model the voltage-dependent pin capacitance (C in ): we apply intelligent moment-matching-based techniques as in [3], and propose a novel formulation for C in estimation. L3: Inability to retarget reliability specifications on the fly for different reliability conditions: we develop the concept of equivalent stress and present closed-form formulas.…”

A retargetable and accurate methodology for logic-IP-internal electromigration assessment

“…Such a modification only affects the average, and not the RMS reliability, which depends only on the ∆T constraint for the RMS rule: if this changes, we can update J rms,th (∆T) and then eq. (10).…”

“…It must be noted that for instances driving a highly resistive network, lumped load usage for querying cellinternal currents becomes pessimistic, [10]. We work around this inaccuracy by developing a custom method to additionally read in the driver parasitics, and de-rate the queried currents.…”