This paper introduces a 43-level asymmetric uniform step cascaded multilevel inverter (CMLI) that consists of four H-bridges per phase, with different dc sources of values E, 2E, 7E and 11E. A mixed integer linear programming (MILP) optimization model is applied to determine the switching angles of the CMLI power switches that can minimize the values of any undesired harmonics. Single phase and three phase cases are considered. The results show very low values of all the undesired harmonics over wide voltage ranges, which agree with the IEEE standards 519-1992 for voltage distortion limits for both the values of %THDE and %V Hmax so that no output filters are needed.