Achieving fast and exact hazard-free logic minimization of extended burst-mode gC finite state machines

Jacobson, Hans; Myers, Chris J.; Gopalakrishman, G.

doi:10.1109/iccad.2000.896490

Cited by 4 publications

(4 citation statements)

References 28 publications

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“…Here, we used the listed benchmarks to compare the model sizes of XBMs and STGs, as well as compare the literal counts between the XBM tools (MINIMALIST and 3D) and the STG tools (PETRIFY and MPSAT via WORKCRAFT) based on their complex-gate implementations. These benchmarks include published XBMs found in the MINIMALIST framework [6], [23] (concur-mixer, dme, dram-ctrl, hp-ir, token-distributor, pe-send-ifc, pscsi, scsi, tangram-mixer), in the 3D [5] tool (biu-dma2fifo, diffeq, fifocellctrl), and in various publications (ack-xbm-si [24], biu-fifo2dma [5], imec-alloc-outbound [25], nowick-basic [4], pooffice-sbuf-send-ctl [17]). For fairness, we have factorised the literal counts produced by MINIMALIST and 3D using LOGIC FRIDAY [26] (a graphical frontend to the ESPRESSO logic minimiser [27]) before counting them, as they were originally in the sum-of-products form.…”

Section: Experimental Results and Analysismentioning

confidence: 99%

Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications

Chan

Sokolov²,

Khomenko

et al. 2023

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Burst-Mode (BM) formalism is a variant of an asynchronous Finite State Machine (FSM) that operates in 'burst-mode' timing assumption and offers simple entry into asynchronous circuit design.However, some of BM's well-formedness properties, while useful for implementing BM specifications as circuits, are rather restrictive in some important contexts e.g. BM's maximal set property (or its analog, Extended Burst-Mode (XBM) formalism's distinguishability constraint) forbids non-deterministic specifications that are inherent in some design approaches, input and output bursts must alternate meaning BMs are not a proper extension of FSMs with arcs labelled by single events, and BMs cannot express input-output concurrency whereas FSMs can with interleaving. The latter limitation is particularly problematic when interoperability between several formalisms is desirable.In this paper, we propose the Burst Automation (BA) model that is more powerful and yet simpler than BM, by relaxing BM's well-formedness properties. BA is a proper extension of FSMs, and can express input-output concurrency and nondeterminism. We define BA's interleaving semantics via its asynchronous reachability graph that is an FSM, and develop three translations from BAs to Signal Transition Graphs (STGs) that preserve strong bisimulation, weak bisimulation, or the language. Former two translations may be exponential, whereas latter translation is linear. The resulting STG can then be used for verification and synthesis into Speed-Independent (SI) or Quasi-Delay-Insensitive (QDI) circuits, or for composition with other STGs.The proposed workflow was implemented in WORKCRAFT, and experimental results show an improved synthesis rate and a significant reduction in the literal count.

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Section: Experimental Results and Analysismentioning

confidence: 99%

Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications

Chan

Sokolov²,

Khomenko

et al. 2023

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…In two-level logic minimization, all the terms are determined concurrently in the first level of two-level logic networks, and combined in the second level of the logic network. There are methods in literature that can provide an optimal two-level implementation of a logic function [5] [6]. Two-level logic minimization of logic functions with large number of variables falls into two categories, exact methods and heuristic methods.…”

Section: Introductionmentioning

confidence: 99%

“…Two-level logic minimization of logic functions with large number of variables falls into two categories, exact methods and heuristic methods. In exact methods, the procedure includes the computing of minimum cover (intractable for large functions), these methods are usually based on Quine-McCluskey method [5], [6]. Quine's theorem states that there is a minimum cover that is prime; consequently the search for minimum cover can be restricted to prime implicants.…”

Section: Introductionmentioning

confidence: 99%

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A new method for two-level logic minimization

Mahmoud

2003 46th Midwest Symposium on Circuits and Systems

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hanani,hmedaHosnifahmoudFacu4y ofEngineerrng, Uniperxl4g ofdiexandria 41/exandr,a, Egypl AAiiract -This paper presents a new algorizhm for twolevel logic minimization. The new method is a ho/zom-up sys/ema/ic methodologyV thaiproauces a mininalfunctioit It is es,pecially usefulfor of logic functions wfth large number ofvariables. The complex4y ofthis algorithm is in the order ofmlogm, where m is the naumber of/minerms in the logicfunclion. Experimental resulzs show that the proposed methodproduces the miniumum cover in almost 99%/ of/he experimentsfor minimizilng logic/linctions wilh less than 10 arizables. 4lso, experimentalresults show hat theproposea methoalproduces the minimum cover in almost &56 of/he experimentsfor,minimzing logicfunctions wilh more zhan 10 varia.les. huis method can be used' in conjunction wilh the Ouine kv theorem to obain the minimum cover wih heirer lme complex4o.

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Efficient exact two-level hazard-free logic minimization

Myers

Jacobson

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001

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Achieving fast and exact hazard-free logic minimization of extended burst-mode gC finite state machines

Abstract: Abstract

Cited by 4 publications

References 28 publications

Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications

Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications

A new method for two-level logic minimization

Efficient exact two-level hazard-free logic minimization

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