Active disturbance rejection control of DC–DC boost converter: a review with modifications for improved performance

Ahmad, Saif; Ali, Ahmad

doi:10.1049/iet-pel.2018.5767

Cited by 59 publications

(36 citation statements)

References 36 publications

(77 reference statements)

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“…Moreover, a torque estimator is used to measure the torque caused by friction in the bearings, brushes and the air, when the dynamometer is coupled with a DC motor. It is therefore necessary to measure the armature current of the DC motor as shown in (16). The load torque estimation coefficients are tuning with a second-order Hurwitz polynomial as shown in (17)…”

Section: Load Torque Estimation Designmentioning

confidence: 99%

“…Additionally, a hardware architecture that estimates the load torque was implemented. The behaviour of the estimate torque module is defined by (16). The discrete approximation of this expression is defined as…”

Section: Estimated Torque Modulementioning

confidence: 99%

“…Actually, the ADRC algorithm has been applied to different research areas, such as control applied to power electronic [16]; DC and AC electric motor drives [17,18]; control of biomass production in a photobioreactor [19]; and it is also used to control the level of liquids in a two-tank system [20]. The ADRC approach based on FPGA implementation has been applied in a few domains of control engineering, for example: highly dynamic parallel orientation manipulator [21], multi-axis system [22], antenna servo system [23], DC servo motor [24] and DC-DC parallel-buck power converter [25].…”

Section: Introductionmentioning

confidence: 99%

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FPGA‐based active disturbance rejection velocity control for a parallel DC/DC buck converter‐DC motor system

Guerrero¹,

Guzmán²,

Linares³

et al. 2020

IET Power Electronics

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This study deals with the robust velocity controller of a DC motor driven by means of parallel DC/DC buck power converters with equal current distribution, from the perspective of a generalised proportional-integral (GPI)-observers-based active disturbance rejection controller (ADRC). The multivariable system is subject to constant torque load demands and changes in the internal parameters. The linear output feedback controllers actively counteract the exogenous and endogenous disturbances that result from the cascading parallel converter and the DC motor. A rapid prototyping tool is used for synthetising the proposed controller into a field-programmable gate array (FPGA) which is based on Matlab/Simulink and a Xilinx System Generator. The robustness of the proposed ADRC system is analysed. The FPGA-based implementation setup is presented with the purpose of validating the theoretical calculations of the proposed DC motor velocity control.

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Section: Load Torque Estimation Designmentioning

confidence: 99%

Section: Estimated Torque Modulementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

FPGA‐based active disturbance rejection velocity control for a parallel DC/DC buck converter‐DC motor system

Guerrero¹,

Guzmán²,

Linares³

et al. 2020

IET Power Electronics

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“…However, they need full state measurement, and have complex controllers and a large dependence on parameters. In order to improve the disturbance rejection ability of the DDC, the active disturbance rejection controller (ADRC) [18] with CPL is designed in [19]; this improves the performance of the converter and has the robustness to face various disturbances and uncertain factors. Although satisfactory disturbance rejection performance of the DDC can be obtained by ADRC, there are many parameters of the controller which need to be determined, and the optimization of these parameters is difficult.…”

Section: Introductionmentioning

confidence: 99%

A Nonlinear Control Strategy for DC-DC Converter with Unknown Constant Power Load Using Damping and Interconnection Injecting

Wang

Tang

et al. 2021

Energies

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DC-DC converters with constant power loads are mostly used in DC microgrids. Negative impedance and large disturbances of constant power loads may lead to the instability of DC-DC converters. To address this issue, a nonlinear control strategy consisting of an improved passivity-based controller and nonlinear power observer is proposed in this paper. First, an improved passivity-based controller is designed based on the port-controlled Hamiltonian with dissipation model. By proper damping and interconnection injecting, the fast dynamic response of output voltage and stability of the DC-DC converter is achieved. Second, the constant power load is observed by a nonlinear power observer, which is adopted to estimate the power variation of the constant power load within a small settling time and improve the adaptability of the DC-DC converter under power disturbance. Finally, the simulation and experimental results are presented, which illustrate the proposed control strategy not only ensures the stability of the DC-DC converter under large disturbances, but also can track the desired operating point with low voltage overshoot in no more than 10 milliseconds.

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“…It finds wide application in renewable energy processing, electric vehicles, battery sources, fuel cells, DC motor drives, radar systems, personal computers, pulsed laser, street and industrial lighting, etc. [1,2]. For the above-said applications, it is necessary to track and regulate the output capacitor voltage in the presence of significant input voltage fluctuation and load variation.…”

Section: Introductionmentioning

confidence: 99%

A graphical approach for controller design with desired stability margins for a DC–DC boost converter

Kalim

Ali

2021

IET Power Electronics

Self Cite

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A novel graphical tuning method of PID controller for output voltage regulation of a DC-DC boost converter is proposed. The advantage of the presented method is that the desired robustness level in terms of gain and phase margins can be pre-specified. A technique to limit the noise level in the control signal to a pre-specified value by selecting the derivative gain (k d ), is also discussed. Simplicity of the technique is an added advantage. Concept of root crossing boundaries along with the gain phase margin tester is applied to compute constant gain and phase margin boundaries in the controller parameters plane. The overlapping area of constant gain and phase margin boundaries within the all stability region is the desired gain and phase margin region (DGPMR). Controller parameters are obtained by computing the centroid of the triangular convex region of the DGPMR. Effectiveness of the proposed tuning strategy is illustrated by simulation and hardware experimental results. Furthermore, the proposed method yields improved closed-loop performance compared to a recently reported tuning strategy in nominal as well as perturbed scenarios.

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Active disturbance rejection control of DC–DC boost converter: a review with modifications for improved performance

Cited by 59 publications

References 36 publications

FPGA‐based active disturbance rejection velocity control for a parallel DC/DC buck converter‐DC motor system

FPGA‐based active disturbance rejection velocity control for a parallel DC/DC buck converter‐DC motor system

A Nonlinear Control Strategy for DC-DC Converter with Unknown Constant Power Load Using Damping and Interconnection Injecting

A graphical approach for controller design with desired stability margins for a DC–DC boost converter

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