Adaption of Ion Implantation for Integrated Circuits

Abstract

Ion implantation has become established as a useful process for MOS device manufacture. In this use the implantation process determines the positioning of the electrically active atoms. F u r t h e r processing consists of low temperature annealing whose primary function is to r e t u r n the implanted atoms to full electrical activity.For processing bipolar IC's, ion implantation is used primarily as a means of obtaining the uniform and reproducible deposition of electrically active impurity atoms. This is usually followed by high temperature heat-treatments which result in the redistribution of these deposited atoms. Such heat-treatments include the oxidation of the surface silicon as well as the indiffusion of additional chemical species. The interaction of these heat-treatments with the radiation defects introduced by the prior ion implantation has been shown to result in the generation of stacking faults and dislocation loops capable of affecting device performance (1).The interest in applying ion implantation as a deposition technique in the processing of bipolar integrated circuits stems from two sources, the inherent uniformity obtainable over an entire wafer surface and the reproducibility from wafer to wafer. This uniformity was evaluated by measuring the resistance of identical 10[~ resistors for 82 IC's which fitted over a 2 in. diameter wafer. The resistors were generated by implanting a fluence of 2.5 • 1013 p3~ cm-2 at an energy of 100 keV. The background was a p-well similar to that used in CMOS construction. Implantation was carried out at room temperature using commercially available equipment. The coefficient of variation, i.e., the standard deviation divided by the average resistor value was 1.0%. This uniformity is reflected in the uniformity of electrical parameters when ion implantation is used as a processing technique. Experimental StudyThis study was based on a specific IC design which had been successfully produced for several years by a triple diffusion technique for which a detailed performance record was available. The three chemical diffusions begin with an arsine collector deposition and drive. The base is formed by a BN deposition and a two-stage drive, first in wet N2 and then in dry N2. h PH3 emitter diffusion completes the diffusions. Test diodes permitted easy evaluation of aIt the following pn junctions: the n -p -collector-substrate junction. the p + n -base collector junction, the n + p + emitterbase junction and the n + p -emitter substrate junction.Experience indicated that the base deposition was the most critical diffusion operation and it was chosen for replacement with an implantation of 1.2 • 101~ B n cm -2 at 30 keV. The chemical emitter diffusion and other steps were maintained without change with one exception. Unless special precautions were taken with the base drive, heavy stacking fault concentrations resulted. These were found to correlate with excess leakage in the n + p + junctions. * Electrochemical Society Active Member. K e y words: t e r n a r y defects,...

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