Abstract:Theoretical results and asymptotic bounds in this area are plentiful (see [Dow81], e.g.), but we are not aware of anyone applying heuristics, as we do, to make chains useable in practice.
Definitions and notationAn addition chain for a given number is a list of numbers having the following properties: l the frost number is one; . every number is the sum of two earlier numbers; l the given number occurs in the chain (at the end, that is). In the case of an addition sequence, the last condition becomes: l the gi… Show more
“…, r t }. Bos and Coster [5] give some heuristics for constructing good addition sequences. A vector addition chain is a sequence of elements v i in N t such that v i = e i for 1 ≤ i ≤ t, and v i = v j + v k for j ≤ k < i.…”
Section: Addition Sequences and Vector Addition Chainsmentioning
confidence: 99%
“…A vector addition chain is a sequence of elements v i in N t such that v i = e i for 1 ≤ i ≤ t, and v i = v j + v k for j ≤ k < i. For example, a vector addition chain for [7,15,23] is: [1,3,5], [2,4,6], [3,7,11], [4,8,12], [7,15,23].…”
Section: Addition Sequences and Vector Addition Chainsmentioning
“…, r t }. Bos and Coster [5] give some heuristics for constructing good addition sequences. A vector addition chain is a sequence of elements v i in N t such that v i = e i for 1 ≤ i ≤ t, and v i = v j + v k for j ≤ k < i.…”
Section: Addition Sequences and Vector Addition Chainsmentioning
confidence: 99%
“…A vector addition chain is a sequence of elements v i in N t such that v i = e i for 1 ≤ i ≤ t, and v i = v j + v k for j ≤ k < i. For example, a vector addition chain for [7,15,23] is: [1,3,5], [2,4,6], [3,7,11], [4,8,12], [7,15,23].…”
Section: Addition Sequences and Vector Addition Chainsmentioning
“…This method does not take advantage of strings of zeros that do not appear on m-bit boundaries. A more flexible window method is demonstrated in [27]. Similar conversions are presented in [4], [7], [20], [28].…”
Abstract-This paper considers the problem of recoding a number to minimize the number of nonzero digits in its representation, that is, to minimize the weight of the representation. A general sliding window scheme is described that extends minimal binary sliding window conversion to arbitrary radix and to encompass signed digit sets. This new conversion expresses a number of known recoding techniques as special cases. Proof that this scheme achieves minimal weight for a given digit set is provided and results concerning the theoretical average and worst-case weight are derived.
“…What we call here double exponentiation shall not be confused with multi-exponentiations (also known as simultaneous exponentiations) that compute a product of powers i m ai i (see for instance [32]). What we call double addition chain is also called addition sequence in the general case where possibly more than two powers must be computed [11,19]. Addition sequences have not been so much investigated.…”
Section: Addition Chain Exponentiationsmentioning
confidence: 99%
“…Addition sequences have not been so much investigated. In [11], the authors propose some heuristics but these are not suitable for implementations constrained in memory.…”
Abstract. Fault Analysis is a powerful cryptanalytic technique that enables to break cryptographic implementations embedded in portable devices more efficiently than any other technique. For an RSA implemented with the Chinese Remainder Theorem method, one faulty execution suffices to factorize the public modulus and fully recover the private key. It is therefore mandatory to protect embedded implementations of RSA against fault analysis. This paper provides a new countermeasure against fault analysis for exponentiation and RSA. It consists in a self-secure exponentiation algorithm, namely an exponentiation algorithm that provides a direct way to check the result coherence. An RSA implemented with our solution hence avoids the use of an extended modulus (which slows down the computation) as in several other countermeasures. Moreover, our exponentiation algorithm involves 1.65 multiplications per bit of the exponent which is significantly less than the 2 required by other self-secure exponentiations.
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