Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators

Liu, Bosheng; Chen, Xiaoming; Wang, Ying; Han, Yinhe; Li, Jiajun; Xu, Haobo; Li, Xiaowei

doi:10.1145/3287624.3287638

Cited by 25 publications

(15 citation statements)

References 9 publications

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“…Не спадає інтерес до створення систем оброблення даних на підставі ООС і в останні роки. Так, наприклад, у роботі [8] автори вказують на потреба удосконалення архітектури ООС для урахування зміни обсягу задіяних обчислювальних комірок при зміні алгоритму оброблення з метою зменшення енергоспоживання, що вимагає власне реконфігурування алгоритму оброблення, у роботі [11] розглянуто удосконалену обчислювальну комірку (процесорний елемент), який орієнтовано на реалізацію частини спеціалізованих обчислень у системі розпізнавання образів, у роботі [15] автори зосередилися на питаннях створення платформи програмування для ООС.…”

Section: ʑ˔˕˖˒unclassified

Matrix Parallel Processor Based on a Homogeneous Computational Medium Using an Advanced Computing Cell

Striamets¹,

V.Yu.²

2021

UJIT

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Described element base of a homogeneous computational medium, which can be effectively used in the creation of signal processing systems using processing algorithms with deep parallelization, up to the bit level. The analysis of advantages and disadvantages of the existing element base is carried out and the new improved structure of a processor element of the homogeneous computational medium is offered. The possibility of multiple use of each element of the entered data, which provides high computational performance of a homogeneous computational medium, is one of the significant advantages of the systolic approach. Other benefits, such as matrix scalability, simplicity, and regularity of data flows, are realized through the use of computing cells with the simplest possible architecture. The architecture of the advanced processor element for construction of the homogeneous computational medium with the improved characteristics in which means of control of computing process in a computing cell, the mechanism of duplication of the channel of input of adjusting information and means of the accelerated change of the operation code is offered. A number of constructive proposals for improving the existing c processor elements and creating a new element base of a homogeneous computational medium are proposed. The mechanisms of testing the matrix of a homogeneous computational medium in order to detect damaged and non-functioning processor elements inside the matrix, the mechanism of rapid change of the operating code of individual processor elements inside the matrix of a homogeneous computational medium are described. The possibility of performing control of the configuration code in the process of writing to the matrix and control of the correctness of operations during the operation of the matrix of a homogeneous computational medium is described. The designed processor element of a homogeneous computational medium further comprises a diagnostic unit, which greatly simplifies the process of testing the matrix to detect inoperable computing cells. The mechanism of increasing the productivity of the computing field and ways to increase the survivability of digital signal processing systems based on a homogeneous computational medium with reconfiguration of the signal processing algorithm taking into account damaged, broken or failed processor elements are described. The matrix of a parallel specialized processor, built on the basis of a homogeneous computational medium, which consists of 720 processor elements, is described. Its functional units and principle of operation are described.

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Section: ʑ˔˕˖˒unclassified

Matrix Parallel Processor Based on a Homogeneous Computational Medium Using an Advanced Computing Cell

Striamets¹,

V.Yu.²

2021

UJIT

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“…Rather than using a single dataflow, several studies have integrated multiple dataflows into an accelerator (with increased hardware cost) and selected the best one according to the layer dimensions [19]- [23]. These approaches usually perform better than the approaches based on a single dataflow.…”

Section: B Related Workmentioning

confidence: 99%

“…Data reuse heavily depends on the convolutional dataflow. There are various approaches to optimize the dataflow: 1) designing an elaborate dataflow [5], [7]- [18], 2) selecting the best dataflow from several candidates [19]- [23], and 3) design space exploration (DSE) [24]- [32]. A fair number of these studies focus on the performance and/or the energy efficiency of the computational components.…”

Section: Introductionmentioning

confidence: 99%

Communication Lower Bound in Convolution Accelerators

Chen

Han

Wang

2020

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)

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In current convolutional neural network (CNN) accelerators, communication (i.e., memory access) dominates the energy consumption. This work provides comprehensive analysis and methodologies to minimize the communication for CNN accelerators. For the off-chip communication, we derive the theoretical lower bound for any convolutional layer and propose a dataflow to reach the lower bound. This fundamental problem has never been solved by prior studies. The on-chip communication is minimized based on an elaborate workload and storage mapping scheme. We in addition design a communication-optimal CNN accelerator architecture. Evaluations based on the 65nm technology demonstrate that the proposed architecture nearly reaches the theoretical minimum communication in a threelevel memory hierarchy and it is computation dominant. The gap between the energy efficiency of our accelerator and the theoretical best value is only 37-87%.

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“…Other studies [50], [51] explore optimizing the mapping and scheduling of computations, either statically or dynamically. These features can be implemented in our baseline accelerator by modifying the control logic and module interconnections.…”

Section: Related Workmentioning

confidence: 99%

Design Space Exploration of Accelerators and End-to-End DNN Evaluation with TFLITE-SOC

Agostini

Dong

Karimi

et al. 2020

2020 IEEE 32nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)

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Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators

Cited by 25 publications

References 9 publications

Matrix Parallel Processor Based on a Homogeneous Computational Medium Using an Advanced Computing Cell

Matrix Parallel Processor Based on a Homogeneous Computational Medium Using an Advanced Computing Cell

Communication Lower Bound in Convolution Accelerators

Design Space Exploration of Accelerators and End-to-End DNN Evaluation with TFLITE-SOC

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