Adiabatic charging of long interconnects

Voss, Burkart; Glesner, Manfred

doi:10.1109/icecs.2000.913006

Cited by 3 publications

(1 citation statement)

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“…The high power efficiency is due to the low-power comparator and carefully designed DAC saving power using the adiabatic charging principle [18]. Another attractive method to reduce the power consumption is to use passive charge-sharing rather than active charge-redistribution as proposed in [19].…”

Section: Discussionmentioning

confidence: 99%

A power-adaptable A/D converter with integrated data compression

Elneel

Aksoy

Schroeder

2010

Analog Integr Circ Sig Process

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A novel adaptable analog/digital converter (ADC) that combines analog/digital conversion and entropycoding for integrated data compression and low-power operation is reported. The converter has high flexibility of operation in terms of adaptable resolution, conversion rate and input signal statistics. This feature allows to adaptively react to changes of the situation and to put the device in each case into the optimum configuration. The ADC has been realized in a 0.6 lm CMOS technology with a peak resolution of 12 bit and 200 kS/s maximum sampling rate. A comprehensive power model of the converter is presented that reflects precisely the power consumption determined from experiments. The model is very useful for optimizing the converter configuration in the node of a wireless sensor network for specific situations. A feasible real-life application is demonstrated.

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Section: Discussionmentioning

confidence: 99%