2024
DOI: 10.11591/ijeecs.v35.i1.pp90-101
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ADKNN fostered BIST with Namib Beetle optimization algorithm espoused BISR for SoC-based devices

Suleman Alnatheer,
Mohammed Altaf Ahmed

Abstract: Redundancy analysis is a widely used method in fault-tolerant memory systems, and it is essential for large-size memories. In current security operations centers (SoCs), memory occupies most of the chip space. To correct these memories using a conventional external equipment test approach is more difficult. To overcome this issue, memory creators utilize redundancy mechanism for substituting the columns and rows along with a spare one to increase output of the memories. In this study, a built-in-self-test (BIS… Show more

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