ADRA: Extending Digital Computing-In-Memory With Asymmetric Dual-Row-Activation

Malhotra, Akul; Saha, Atanu; Wang, Chunguang; Gupta, Sumeet Kumar

doi:10.1109/tcsii.2023.3253659

Cited by 2 publications

(1 citation statement)

References 23 publications

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“…There is also another type of voltage-sensing operation of FeFETs by a bitline-discharging scheme [53]. An advantage of the source-follower voltage-sensing scheme is that it can be operated under a positive bias voltage following equation ( 8) regardless of whether V th is negative (figure 3(c)) or positive (figure 3(d)).…”

Section: Voltage-sensing Memorymentioning

confidence: 99%

Ferroelectric source follower for voltage-sensing nonvolatile memory and computing-in-memory

Toprasertpong

Matsui

Takenaka

et al. 2023

J. Phys. D: Appl. Phys.

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Memory arrays and computing-in-memory architecture based on emerging nonvolatile memory devices with a current-sensing scheme face several challenges when implemented in large-scale arrays, such as power and area penalties, voltage drop, and power-source limitation. Here, we demonstrate ferroelectric source followers as nonvolatile memory devices operating with a voltage-sensing scheme. The voltage output read out from the source terminal of a ferroelectric field-effect transistor is determined in a nonvolatile manner by the polarization state stored in a ferroelectric gate insulator, giving a higher output voltage at a lower threshold voltage. Device modeling reveals that the output voltage is described by a simple expression of the threshold voltage, gate bias, drain bias, and body-effect factor. Simple characteristics, low readout energy consumption (~fJ) owing to an absence of steady current, and fast readout operation (~ns) make ferroelectric source followers promising for voltage-sensing nonvolatile memory and voltage-sensing synapse as well as activation function (biased rectified linear unit) in computing-in-memory.

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Section: Voltage-sensing Memorymentioning

confidence: 99%