Advanced Bonding Technology Based on Nano- and Micro-metal Pastes

Suganuma, Katsuaki; Jiu, Jinting

doi:10.1007/978-3-319-45098-8_14

Cited by 12 publications

(2 citation statements)

References 185 publications

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“…Particle sintering has emerged as a reliable alternative to soldering in recent years for high-temperature applications [18]. Sintering is a mass transport phenomenon driven by the reduction in surface energy [16] and can be classified into three main stages: an initial stage defined by the formation of necks between the particles in contact, an intermediate stage defined by the formation of interconnected pores and the onset of grain growth, and a final stage defined by the development of isolated pores, thereby removing any hindrance to grain growth.…”

Section: Sinteringmentioning

confidence: 99%

Comparison of Nondestructive Testing Methods for Solder, Sinter, and Adhesive Interconnects in Power and Opto-Electronics

et al. 2020

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Reliability is one of the major requirements for power and opto-electronic devices across all segments. High operation temperature and/or high thermomechanical stress cause defects and degradation of materials and interconnects, which may lead to malfunctions with costly or even life-threatening consequences. To avoid or at least reduce failures, nondestructive testing (NDT) methods are common within development and production of power and opto-electronics. Currently, the dominating NDT methods are X-ray, scanning acoustic microscopy (SAM), and transient thermal analysis (TTA). However, they have different strengths and weaknesses with respect to materials and mechanical designs. This paper compares these NDT methods for different interconnect technologies, i.e., reflow soldering, adhesive, and sintered interconnection. While X-ray provided adequate results for soldered interfaces, inspection of adhesives and sintered interconnects was not possible. With SAM, evaluation of adhesives and sintered interconnects was also feasible, but quality depended strongly on the sample under test. TTA enabled sufficiently detailed results for all the interconnect applications. Automated TTA equipment, as the in-house developed tester used within this investigation, enabled measurement times compatible with SAM and X-ray. In the investigations, all methods revealed their pros and cons, and their selection has to depend on the sample under tests and the required analysis depth and data details. In the paper, guidelines are formulated for an appropriate decision on the NDT method depending on sample and requirements.

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Section: Sinteringmentioning

confidence: 99%

Comparison of Nondestructive Testing Methods for Solder, Sinter, and Adhesive Interconnects in Power and Opto-Electronics

et al. 2020

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“…The significance of the vertical interconnection dimension or bond-line thickness (BLT) is even more evident in the case of die-to-substrate bonding in power semiconductor devices based on wide band gap (WBG) SiC and GaN, which are being explored as another route to extend Moore’s law and to replace silicon for many needed emerging applications [ 1 , 2 ]. However, the apparent potential of WBG semiconductors is currently far from being realized because of lacking a more advanced die interconnection and bonding method for achieving a much lower electrical (and thermal) resistance than current methods including the much-explored nano-silver sintering bonding [ 15 ].…”

Section: Introductionmentioning

confidence: 99%

Semiconductor Chip Electrical Interconnection and Bonding by Nano-Locking with Ultra-Fine Bond-Line Thickness

et al. 2021

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The potential of an innovation for establishing a simultaneous mechanical, thermal, and electrical connection between two metallic surfaces without requiring a prior time-consuming and expensive surface nanoscopic planarization and without requiring any intermediate conductive material has been explored. The method takes advantage of the intrinsic nanoscopic surface roughness on the interconnecting surfaces: the two surfaces are locked together for electrical interconnection and bonding with a conventional die bonder, and the connection is stabilized by a dielectric adhesive filled into nanoscale valleys on the interconnecting surfaces. This “nano-locking” (NL) method for chip interconnection and bonding is demonstrated by its application for the attachment of high-power GaN-based semiconductor dies to its device substrate. The bond-line thickness of the present NL method achieved is under 100 nm and several hundred times thinner than those achieved using mainstream bonding methods, resulting in a lower overall device thermal resistance and reduced electrical resistance, and thus an improved overall device performance and reliability. Different bond-line thickness strongly influences the overall contact area between the bonding surfaces, and in turn results in different contact resistance of the packaged devices enabled by the NL method and therefore changes the device performance and reliability. The present work opens a new direction for scalable, reliable, and simple nanoscale off-chip electrical interconnection and bonding for nano- and micro-electrical devices. Besides, the present method applies to the bonding of any surfaces with intrinsic or engineered surface nanoscopic structures as well.

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Recent Advancement of Research in Silver‐Based Solder Alloys

Sharif

2019

Harsh Environment Electronics

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Advanced Bonding Technology Based on Nano- and Micro-metal Pastes

Cited by 12 publications

References 185 publications

Comparison of Nondestructive Testing Methods for Solder, Sinter, and Adhesive Interconnects in Power and Opto-Electronics

Comparison of Nondestructive Testing Methods for Solder, Sinter, and Adhesive Interconnects in Power and Opto-Electronics

Semiconductor Chip Electrical Interconnection and Bonding by Nano-Locking with Ultra-Fine Bond-Line Thickness

Recent Advancement of Research in Silver‐Based Solder Alloys

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