Advanced Data Converters

Manganaro, Gabriele

doi:10.1017/cbo9780511794292

Cited by 50 publications

(64 citation statements)

References 297 publications

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“…require a typical range of 60 or 70 dB of linearity [14]. However for the next generation radio telecommunication systems very high linearity is required [15]. On the other hand, software-defined radio (SDR), needs the flexibility of the transceiver as well as the reconfigurable sampling as their key components.…”

Section: Digital-to-analog Converters For Telecommunicationsmentioning

confidence: 99%

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On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters

Sadeghifar¹

2015

Linköping Studies in Science and Technology. Thesis

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High-speed and high-resolution digital-to-analog converters (DACs) are vital components in all telecommunication systems. Radio-frequency digital-to-analog converter (RFDAC) provides high-speed and high-resolution conversion from digital domain to an analog signal. RFDACs can be employed in direct-conversion radio transmitter architectures. The idea of RFDAC is to utilize an oscillatorypulse-amplitude modulation instead of the conventional zero-order hold pulse amplitude modulation, which results in DAC output spectrum to have highenergy high-frequency lobe, other than the Nyquist main lobe. The frequency of the oscillatory pulse can be chosen, with respect to the sample frequency, such that the aliasing images of the signal at integer multiples of the sample frequency are landed in the high-energy high-frequency lobes of the DAC frequency response. Therefore the high-frequency images of the signal can be used as the output of the DAC, i.e., no need to the mixing stage for frequency upconversion after the DAC in the radio transmitter. The mixing stage however is not eliminated but it is rather moved into the DAC elements and therefore the local oscillator (LO) signal with high frequency should be delivered to each individual DAC element.In direct-conversion architecture of IQ modulators which utilize the RFDAC technique, however, there is a problem of finite image rejection. The origin of this problem is the different polarity of the spectral response of the oscillatorypulse-amplitude modulation in I and Q branches. The conditions where this problem can be alleviated in IQ modulator employing RFDACs is also discussed in this work.Σ∆ modulators are used preceding the DAC in the transmitter chain to reduce the digital signal's number of bits, still maintain the same resolution. By utilizing the Σ∆ modulator now the total number of DAC elements has decreased and therefore the delivery of the high-frequency LO signal to each DAC element is practical. One of the costs of employing Σ∆ modulator, however, is a higher quantization noise power at the output of the DAC. The quantization noise is ideally spectrally shaped to out-of-band frequencies by the Σ∆ modulator. The shaped noise which usually has comparatively high power must be filtered out to fulfill the radio transmission spectral mask requirement.Semi-digital FIR filter can be used in the context of digital-to-analog conversion, cascaded with Σ∆ modulator to filter the out-of-band noise by the modulator. In the same time it converts the signal from digital domain to an analog quantity. In general case, we can have a multi-bit, semi-digital FIR filter where each tap of the filter is realized with a sub-DAC of M bits. The delay elements are also realized with M-bit shift registers. If the output of the modulator is given by a single bit, the semi-digital FIR filter taps are simply controlled by a single switch assuming a current-steering architecture DAC. One of the major advantages is that the static linearity of the DAC is optimum. Since there are only t...

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Section: Digital-to-analog Converters For Telecommunicationsmentioning

confidence: 99%

“…The current-mode operation copes with the slew-rate problem of which other DAC architectures suffer. It directs almost all of its current to the output, which means high efficiency [15,18]. The block diagram of a binary weighted currentsteering DAC is shown in 2.3.…”

Section: Current-steering Digital-to-analog Convertersmentioning

confidence: 99%

On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters

Sadeghifar¹

2015

Linköping Studies in Science and Technology. Thesis

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“…achieve high SNR or spurious-free dynamic range, SFDR) has been identified as one of the drivers for the observed trends of ADC performance. Several surveys and analysis of trends have been published in [29][30][31], and [4] presents a good overview of all of them, along with some additional considerations. Here, we will simply highlight some of the critical conclusions.…”

Section: Evolution Of Adc Performancementioning

confidence: 99%

“…software defined radio) [29], but the pressure to reduce costs (lower area) and optimize efficiency to extend battery life is enormous. Thus commercial motivations end up influencing overall ADC performance evolution and research efforts [4]. Another factor is that high-resolution ADCs are noise limited, whereas the architectures typically employed in high-speed converters rely on the speed capabilities of the transistors.…”

Section: Evolution Of Adc Performancementioning

confidence: 99%

“…This means technology scaling has a more profound (positive) impact on the performance of medium-or low-resolution/high-speed ADCs. In fact their energy efficiency doubles every 1.6 years, while it takes about 5.4 years to see the same energy efficiency improvement in high-resolution ADCs [4]. Figure 3 shows the energy efficiency evolution for some of the Nyquist rate Synopsys ADC IP products, all of them designed with core devices in 65, 40 and 28 nm CMOS technologies.…”

Section: Evolution Of Adc Performancementioning

confidence: 99%

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Recent Advances and Trends in High-Performance Embedded Data Converters

Figueiredo¹

2014

High-Performance AD and DA Converters, IC Design in Scaled Technologies, and Time-Domain Signal Processing

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This chapter discusses the architectures of Nyquist rate Analog-toDigital Converters (ADCs), that are embedded in systems-on-chip (SoCs) implementing some of the most widespread mobile communication, wireless and wireline connectivity standards. The typical requirements for these ADCs are presented, and the main conversion architectures are described in terms of the fundamental operations realized inside them. This constitutes a unified treatment that relates all architectures, thus providing a deeper understanding of their fundamental limitations and trade-offs. We then discuss some of the solutions recently published in the literature to improve ADC energy efficiency. Finally we disclose implementation details from two 12 bit digitally calibrated, high-speed ADCs, using the pipeline and SAR architectures.

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Recent progress on CMOS successive approximation ADCs

Matsuura

2016

IEEJ Transactions Elec Engng

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Recent progress in CMOS integrated successive approximation (SAR) analog-to-digital converters (ADCs) is remarkable in terms of architecture and performance. Because of the inherent non-necessity of active circuit elements such as operational amplifiers, the SAR architecture is suitable for fine CMOS processes. By using a time-interleaved architecture, it achieves a very high speed conversion rate of 90 G-sample/s with an 8-bit resolution. Also, for applications with very low power consumption, such as wireless sensor nodes, it achieves 84 nW at 10-bit, 200 k-sample/s. A high signal to noise and distortion ratio (SNDR) can also be achieved by using several techniques such as an SAR architecture that combines oversampling and noise shaping. This survey paper explains the progress made recently in SAR-ADC circuit techniques and the achieved performances.

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Advanced Data Converters

Cited by 50 publications

References 297 publications

On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters

On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters

Recent Advances and Trends in High-Performance Embedded Data Converters

Recent progress on CMOS successive approximation ADCs

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