Advanced patterning solutions based on double exposure: double patterning and beyond

Bae, Young Chan; Liu, Yi; Cardolaccia, Thomas; Spizuoco, Ken; Bell, Rosemary; Joesten, Lori; Pikon, A.; Reilly, Michael T.; Ablaza, Sheri L.; Trefonas, Peter; Barclay, George G.

doi:10.1117/12.840461

Cited by 6 publications

(6 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In a previous report, 21 we presented the first example of self-aligned double patterning (SADP) with contact holes using SPADE II process which does not require a second mask to print a second set of contact holes. Not only CD but also pitch is reduced after double patterning and the original contact hole pitch (a) is reduced to a/ 2 after double patterning (~30% reduction in pitch).…”

Section: Space Patterning Assisted By Double Exposure (Spade Ii)mentioning

confidence: 99%

“…21 EPIC TM 2098 Positive Photoresist was coated over the primed L1 patterns at a spin speed that would give similar thickness for L1 and L2 layers. The wafer was soft-baked at 110°C for 60 seconds, and then coated with OC™2000 Topcoat.…”

Section: Spade Processmentioning

confidence: 99%

“…20 As an alternative method to extend 193nm immersion lithography, we recently reported the SPADE TM technology that can offer shrink process of contact holes, self-aligned double patterning of contact holes, and self-aligned double patterning of lines. 21 Three different advanced patterning schemes were developed using SPADE and we report recent progress with SPADE technology in the following three applications: …”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Advanced patterning solutions based on the "shrink process assisted by double exposure" (SPADE)

Bae¹,

Liu²,

Cardolaccia³

et al. 2010

SPIE Proceedings

Self Cite

View full text Add to dashboard Cite

By combining chemical and thermal curing techniques, we developed a simple "hybrid" curing system which offers precise CD control of the first patterns after double patterning. This hybrid curing system involves thermal curing followed by a liquid rinse process using a double patterning primer (DPP). DPP is an aqueous solution formulated with surface curing agent (SCA) components and enhances "positive" interaction between L1 and L2 patterns. Taking advantage of the CD growth with DPP treatment, we further developed three advanced patterning schemes: 1. "Shrink Process Assisted by Double Exposure" (SPADE TM I Process), 2. "Space Patterning Assisted by Double Exposure" (SPADE II), and 3. "Sidewall Patterning Assisted by Double Exposure" (SPADE III). Using SPADE I, contact hole CD was reduced by 10~30nm and excellent through pitch performance was achieved. Using SPADE II, the first example of self-aligned double patterning of contact holes has been demonstrated. After SPADE II, the contact hole pitch was reduced by 30%. A novel method was developed to form sidewalls on the existing patterns using SPADE III. The 2D sidewall patterning with contact holes was demonstrated and ~40nm sidewalls were formed using SPADE III. This can also be applied to form sidewall patterns on line and space patterns to self-aligned double patterning of lines. In this paper, our recent progress with SPADE technology is described and its potential use in the advanced patterning schemes is discussed.Keywords: double patterning primer, self-aligned double patterning, SPADE, shrink process assisted by double exposure (SPADE I), space patterning assisted by double exposure (SPADE II), sidewall patterning assisted by double exposure (SPADE III),

show abstract

Section: Space Patterning Assisted By Double Exposure (Spade Ii)mentioning

confidence: 99%

Section: Spade Processmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Advanced patterning solutions based on the "shrink process assisted by double exposure" (SPADE)

Bae¹,

Liu²,

Cardolaccia³

et al. 2010

SPIE Proceedings

Self Cite

View full text Add to dashboard Cite

show abstract

“…Over the past years, EUV lithography has been actively researched and developed as the next-generation lithography (NGL) solution although its readiness for high volume manufacturing (HVM) has been long-awaited and still unclear 1,2 . Double patterning techniques, such as litho-litho-etch (LLE) 3,4 , litho-etch-litho-etch (LELE) 5,6 , and self-aligned double patterning (SADP) 7,8 have been developed to extend the ultimate resolution k 1 factor of 193 nm immersion lithography. However, the need for device scaling in 14 nm and beyond technology nodes necessitates the implementation of more aggressive multiple patterning techniques 9,10 .…”

Section: Introductionmentioning

confidence: 99%

Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask

et al. 2014

View full text Add to dashboard Cite

The Cost of Ownership (CoO) for semiconductor processing has been primarily dominated by lithography. In multiple patterning processes, additional materials and the impact to throughput of multiple patterning passes appear to become additional major contributors to manufacturing cost as well. We introduce SiO x N y hardmask as a new memorization layer for multiple patterning that addresses the non-lithographic cost contributor to manufacturing. The optical constants of the SiO x N y hardmask are matched to those of the photoresist at the imaging wavelength, and that makes it invisible at the exposure wavelength, enabling lithography directly over the hardmask topography, while at the same time it will be visible to those wavelengths that are used for alignment and overlay. The SiO x N y hardmask is inserted below the photoresist which will make the rework and integration schemes much simpler and result in cost savings by replacing only photoresist layers during multiple patterning processes. Additionally, by eliminating the need for traditional spincast planarization and the associated tri-layer etch we can improve the critical dimension uniformity (CDU) and reduce proximity contributions from etch, and their respective etch proximity corrections. In this work, we engineered the lithographic stack to be compatible with the invisible SiO x N y hardmask. Lithographic process windows, CDU, and LER/LWR are compared with conventional tri-layer stack and we demonstrate triple patterning memorized into the SiO x N y hardmask after which patterns are then transferred, at once, into the bottom integrated stack. Finally, major benefits of using the invisible hardmask on device scaling and patterning challenges are discussed, such as for LE 2 , LE 3 , and trench and cut patterning.

show abstract

“…This explains Double-Expose-Track-Optimized ( DETO) as the equivalent name for LFL. In this scheme, a "freeze" process would cure the Layer 1 resist pattern, either chemically 9 -12 or thermally 13,14 , before the Layer 2 resist is coated. The "freeze" process and the chemical intermixing between the resist coatings can generate defects specific to this DP scheme.…”

Section: Introductionmentioning

confidence: 99%

Evaluation of double-patterning techniques for advanced logic nodes

et al. 2010

View full text Add to dashboard Cite

The development of Double-Patterning (DP) techniques continues to push forward aiming to extend the immersion based lithography below 36 nm half pitch. There are widespread efforts to make DP viable for further scaling of semiconductor devices. We have developed Develop/Etch/Develop/Etch (DE2) and Double-Expose-Track-Optimized (DETO) techniques for producing pitch-split patterns capable of supporting semiconductor devices for the 16 nm and 11 nm nodes. The IBM Alliance has established a DETO baseline, in collaboration with ASML, TEL, CNSE, and KLATencor, to evaluate the manufacturability of DETO by using commercially available resist systems. Presented in this paper are the long-term performance results of these systems relevant to defectivity, overlay, and CD uniformity.

show abstract

Advanced patterning solutions based on double exposure: double patterning and beyond

Cited by 6 publications

References 9 publications

Advanced patterning solutions based on the "shrink process assisted by double exposure" (SPADE)

Advanced patterning solutions based on the "shrink process assisted by double exposure" (SPADE)

Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask

Evaluation of double-patterning techniques for advanced logic nodes

Contact Info

Product

Resources

About

Advanced patterning solutions based on double exposure: double patterning and beyond

Cited by 6 publications

References 9 publications

Advanced patterning solutions based on the "shrink process assisted by double exposure" (SPADE)

Advanced patterning solutions based on the "shrink process assisted by double exposure" (SPADE)

Novel and cost-effective multiple patterning technology by means of invisible SiOxNy hardmask

Evaluation of double-patterning techniques for advanced logic nodes

Contact Info

Product

Resources

About

Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask